Displaying 20 results from an estimated 1000 matches similar to: "[LLVMdev] HazardRecognizer and RegisterAllocation"
2009 Jan 19
0
[LLVMdev] HazardRecognizer and RegisterAllocation
On Jan 19, 2009, at 9:17 AM, Patrick Boettcher wrote:
> Hi list,
>
> in our LLVM-based-project we are writing a backend for our
> processor. The
> architecture is a quite straight-forward RISC, but it does not have
> hardware interlocks, i.e. data hazards involving memory access must be
> resolved by the compiler, either by scheduling unrelated
> instructions or
>
2009 Jan 19
3
[LLVMdev] HazardRecognizer and RegisterAllocation
Hi Evan,
thanks for your response.
On Mon, 19 Jan 2009, Evan Cheng wrote:
>> For example, code which looks like that:
>>
>> load 0x1234, reg1
>> noop
>> noop
>> add reg1, 1
>> load 0x1236, reg2
>>
>> can be safely transformed to:
>>
>> load 0x1234, reg1
>> load 0x1236, reg2
>> noop
>> add reg1, 1
>>
>
2009 Jan 20
1
[LLVMdev] HazardRecognizer and RegisterAllocation
Dan:
CellSPU could clearly benefit from the post-RA scheduler. In fact, we
were thinking about writing a machine pass of our own.
One thing that does "disturb" me is that both HazardRecognizer and
post-RA sched assume there's only one kind of NOP. For Cell, there
are two, depending upon the pipeline being filled. Pipe 0 takes
"ENOP" whereas Pipe 1 take
2009 Jan 19
0
[LLVMdev] HazardRecognizer and RegisterAllocation
On Jan 19, 2009, at 11:01 AM, Patrick Boettcher wrote:
>
>
>>> And more generally: Is the hazardRecognizer the right and only way
>>> to
>>> solve our NOOP-minimizing problem?
>>
>> Perhaps you want to do this after register allocation is done. Dan is
>> developing the post-allocation scheduler. You can try it out.
>
> Interesting. Can it
2008 Aug 13
2
which alternative tests instead of AIC/BIC for choosing models
Dear R Users,
I am looking for an alternative to AIC or BIC to choose model parameters.
This is somewhat of a general statistics question, but I ask it in this
forum as I am looking for a R solution.
Suppose I have one dependent variable, y, and two independent variables,
x1 an x2.
I can perform three regressions:
reg1: y~x1
reg2: y~x2
reg3: y~x1+x2
The AIC of reg1 is 2000, reg2 is
2017 Feb 14
2
Ensuring chain dependencies with expansion to libcalls
Hi all,
Our target does not have native support for 64-bit integers, so we rely on
library calls for certain operations (like sdiv). We recently ran into a
problem where these operations that are expanded to library calls aren't
maintaining the proper ordering in relation to other chains in the DAG.
The following snippet of a DAG demonstrates the problem.
t0: ch = EntryToken
t2:
2017 Sep 14
2
Live Register Spilling
> On Sep 13, 2017, at 9:03 PM, jin chuan see via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
> Hi All,
>
> Thanks for the reply. I managed to identify and fixed a few errors in my implementation.
>
> However, there are a few errors that i am not sure what is it indicating.
> For starters, i think i should explain what i am trying to achieve.
>
> I am
2012 Sep 28
1
blank plot----how do I make symbols appear
Hi,
I am trying to create a scatterplot, coding each point to one of 5
populations. I was successful when I did this for one set of data, yet
when I try plotting other data a blank plot appears (although the axes are
labelled and I can fit the regression lines from each population). I have
tried a variety of things to fix this but nothing seems to work.
I can plot the points if I do not
2007 Dec 05
1
Working with "ts" objects
I am relatively new to R and object oriented programming. I have relied on
SAS for most of my data analysis. I teach an introductory undergraduate
forecasting course using the Diebold text and I am considering using R in
addition to SAS and Eviews in the course. I work primarily with univariate
or multivariate time series data. I am having a great deal of difficulty
understanding and working with
2014 Aug 15
2
[LLVMdev] Help with definition of subregisters; spill, rematerialization and implicit uses
Hi,
I have a problem regarding sub-register definitions and LiveIntervals on
our target. When a subregister is defined, other parts of the register
are always left untouched - they are neither read or def:ed.
It however seems that Codegen treats subregister definitions as somehow
clobbering the whole register.
The SSA-code looks like this after isel:
(Reg0 and Reg1 are 16bit registers. Reg2,
2009 Aug 16
1
How to deal with multicollinearity in mixed models (with lmer)?
Dear R users,
I have a problem with multicollinearity in mixed models and I am using lmer
in package lme4. From previous mailing list, I learn of a reply
"http://www.mail-archive.com/r-help at stat.math.ethz.ch/msg38537.html" which
states that if not for interpretation but just for prediction,
multicollinearity does not matter much. However, I am using mixed model to
interpret something,
2017 Sep 12
2
Live Register Spilling
Running llc with '-verify-machineinstrs' may tell you which instruction break the SSA form.
Ruiling
From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of jin chuan see via llvm-dev
Sent: Monday, September 11, 2017 10:02 AM
To: Matthias Braun <mbraun at apple.com>
Cc: llvm-dev at lists.llvm.org
Subject: Re: [llvm-dev] Live Register Spilling
Sorry about the
2015 Aug 18
2
RFC for a design change in LoopStrengthReduce / ScalarEvolution
> Of course, and the point is that, for example, on x86_64, the zext here is free. I'm still trying to understand the problem...
>
> In the example you provided in your previous e-mail, we choose the solution:
>
> `GEP @Global, zext(V)` -> `GEP (@Global + zext VStart), {i64 0,+,1}`
> `V` -> `trunc({i64 0,+,1}) + VStart`
>
> instead of the actually-better
2009 Nov 24
2
random effects correlation in lmer
I am having an issue with lmer that I wonder if someone could explain.
I am trying to fit a mixed effects model to a set of longitudinal data
over a set of individual subjects:
(fm1 <- lmer(x ~ time + (time|ID),aa))
I quite often find that the correlation between the random effects is 1.0:
Linear mixed model fit by REML
Formula: x ~ time + (time | ID)
Data: aa
AIC BIC logLik deviance
2009 Jan 20
1
[LLVMdev] HazardRecognizer and RegisterAllocation
On Monday 19 January 2009 19:47, Dan Gohman wrote:
> > Can they be used in conjunction with
> > MemoryDependenceAnalysis? e.g. can we write a MachineInstructions-
> > based
> > memory dependence analysis that uses MachineMemoryOperands?
>
> Right, the existing MemoryDependenceAnalysis works in terms of
> LLVM-IR-level Instructions, but yes, it would be possible
2009 Jan 20
0
[LLVMdev] HazardRecognizer and RegisterAllocation
On Jan 19, 2009, at 3:38 PM, David Greene wrote:
> On Monday 19 January 2009 16:42, Dan Gohman wrote:
>
>>>> Perhaps you want to do this after register allocation is done.
>>>> Dan is
>>>> developing the post-allocation scheduler. You can try it out.
>>>
>>> Interesting. Can it already be found SVN? I will search the mail
>>>
2009 Jan 19
2
[LLVMdev] HazardRecognizer and RegisterAllocation
On Monday 19 January 2009 16:42, Dan Gohman wrote:
> >> Perhaps you want to do this after register allocation is done. Dan is
> >> developing the post-allocation scheduler. You can try it out.
> >
> > Interesting. Can it already be found SVN? I will search the mail
> > archive
> > later, if not.
>
> Yes, it is in SVN. It's new, and so far
2009 Jan 20
0
[LLVMdev] HazardRecognizer and RegisterAllocation
On Jan 19, 2009, at 5:06 PM, David Greene wrote:
> On Monday 19 January 2009 18:21, Dan Gohman wrote:
>
>>> Dan, how does the scheduler handle memory dependence? I'm working
>>> on
>>> something that requires memory dependence information for
>>> MachineInstructions.
>>
>> At the moment, it knows simple things, like constant pool loads
2011 Jun 10
4
Linear multivariate regression with Robust error
Dear all,
i am doing linear regression with robust error to know the effect of
a (x) variable on (y)other if i execute the command i found positive
trend.
But if i check the effect of number of (x.x1,x2,x3)variables
on same (y)variable then the positive effect shwon by x variable turns
to negative. so plz help me in this situation.
Barjesh Kochar
Research scholar
2009 Jan 20
2
[LLVMdev] HazardRecognizer and RegisterAllocation
On Monday 19 January 2009 18:21, Dan Gohman wrote:
> > Dan, how does the scheduler handle memory dependence? I'm working on
> > something that requires memory dependence information for
> > MachineInstructions.
>
> At the moment, it knows simple things, like constant pool loads
> don't have dependencies, and references to distinct stack slots are
>