similar to: [LLVMdev] A question about using LLVM in an embedded system

Displaying 20 results from an estimated 20000 matches similar to: "[LLVMdev] A question about using LLVM in an embedded system"

2008 Nov 18
1
[LLVMdev] Do I need to add new intrinsic functions for the OpenGL shading language swizzle?
OpenGL shading language (GLSL) is like a C subset language, but it contains some special features, ex: native vector type & swizzle. In GLSL, you can declare vector types: void main() { vec4 a; vec3 b; vec2 c; } You can access the element of vector by using .xyzw, it means the 1st, 2nd, 3rd, 4th element of the vector are x, y, z, w. Ex: void main() { float f; vec4 a = vec4(1.0,
2008 Nov 17
2
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
I have a very strange and complicate H/W platform. It has many registers in one format. The register format is: ------------------------------ ---------------------------------------------------------------------------------------- | 24-bit | 24-bit | 24-bit | 24-bit |
2008 Nov 18
0
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
Why not model each channel as a separate physical register? Evan On Nov 17, 2008, at 6:36 AM, Wei wrote: > I have a very strange and complicate H/W platform. > It has many registers in one format. > The register format is: > > ------------------------------ > ---------------------------------------------------------------------------------------- > | 24-bit
2008 Nov 21
0
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
24 bit is not unusual in the DSP world. I suppose int == 24 bit integer for some of these chips? There isn't a i24 simple type. However, you can create an extended integer type. See getExtendedIntegerVT. It's almost guaranteed you will have to change a chunk of target independent codegen to support the use of an extended type though. Evan On Nov 20, 2008, at 4:46 AM, Wei wrote:
2008 Nov 22
0
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
On Nov 22, 2008, at 11:03 AM, Wei wrote: > I have 24-bit integer operations as well as 24-bit floating point > (s7.16) operations. > > The H/W supports load/store instructions, however, they does suggest > us not to use these load/store instructions besides debugging purpose. > That is to say, you can imagine we don't have load/store instructions, > we don't have
2008 Nov 24
0
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
On Nov 22, 2008, at 7:48 AM, Wei wrote: > Do you mean MVT::getIntegerVT? Because I can not find > getExtendedIntegerVT in the llvm source codes. > I am excited seeing this function, however I have the following more > questions. See ValueTypes.h and ValueTypes.cpp. Also this example: @str = internal constant [4 x i8] c"%d\0A\00" define void @foo2(i24 %a, i24 %b) nounwind
2008 Nov 20
0
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
This is similar to ATI's R300/R420 pixel shaders. I'm familiar with this hardware, but not really an LLVM expert (working on a code generator myself, but learning as I go). Do you have 24-bit integer operations, or just floating point? What about load/store? Are you looking to run large C programs with complex data structures, or just comparatively simple math functions (i.e. a
2008 Nov 22
2
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
Do you mean MVT::getIntegerVT? Because I can not find getExtendedIntegerVT in the llvm source codes. I am excited seeing this function, however I have the following more questions. 1) You mention I will have to change not small amount of target indenpendent codegen codes to support this extended type. Are there any document to describe how to do such kind modification? I see there is a
2008 Nov 20
4
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
Because each channel contains 24-bit, so.. what is the llvm::SimpleValueType I should use for each channel? the current llvm::SimpleValueType contains i1, i8, i16, i32, i64, f32, f64, f80, none of them are fit one channel (24-bit). I think I can use i32 or f32 to represent each 24-bit channel, if the runtime result of some machine instructions exceeds 23-bit (1 bit is for sign), then it is an
2017 Feb 24
0
Re: "virsh list" hangs
On 02/21/2017 12:07 PM, Yunchih Chen wrote: > On 02/20/2017 09:10 PM, Michal Privoznik wrote: >> On 17.02.2017 17:18, Yunchih Chen wrote: >>> `virsh list` hangs on my server that hosts a bunch of VMs. >>> This might be due to the Debian upgrade I did on Feb 15, which upgrades >>> `libvirt` from 2.4.0-1 to 3.0.0-2. >>> I have tried restarting libvirtd
2008 Nov 22
2
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
I have 24-bit integer operations as well as 24-bit floating point (s7.16) operations. The H/W supports load/store instructions, however, they does suggest us not to use these load/store instructions besides debugging purpose. That is to say, you can imagine we don't have load/store instructions, we don't have memory, we just have registers. I will run OpenGL shading laugnage programs on
2017 Feb 21
4
Re: "virsh list" hangs
On 02/20/2017 09:10 PM, Michal Privoznik wrote: > On 17.02.2017 17:18, Yunchih Chen wrote: >> `virsh list` hangs on my server that hosts a bunch of VMs. >> This might be due to the Debian upgrade I did on Feb 15, which upgrades >> `libvirt` from 2.4.0-1 to 3.0.0-2. >> I have tried restarting libvirtd for a few times, without luck. >> >> Attached below are
2017 Feb 24
0
Re: "virsh list" hangs
On Fri, Feb 24, 2017 at 11:52:43PM +0800, Yunchih Chen wrote: > > > On 02/24/2017 11:30 PM, Daniel P. Berrange wrote: > > On Tue, Feb 21, 2017 at 12:07:41PM +0800, Yunchih Chen wrote: > > > On 02/20/2017 09:10 PM, Michal Privoznik wrote: > > > > On 17.02.2017 17:18, Yunchih Chen wrote: > > > > > `virsh list` hangs on my server that hosts a bunch
2017 Feb 17
2
"virsh list" hangs
`virsh list` hangs on my server that hosts a bunch of VMs. This might be due to the Debian upgrade I did on Feb 15, which upgrades `libvirt` from 2.4.0-1 to 3.0.0-2. I have tried restarting libvirtd for a few times, without luck. Attached below are some relevant logs; let me know if you need some more for debugging. Thanks for your help!! root@vm-host:~# uname -a Linux vm-host 4.6.0-1-amd64 #1
2010 Mar 19
5
[LLVMdev] Idea for Google Summer Code : C Compiler for EFI Byte Code implement in LLVM
On Fri, Mar 19, 2010 at 3:47 PM, Chris Lattner <clattner at apple.com> wrote: > > On Mar 19, 2010, at 11:08 AM, 琬菁楊 wrote: > > > Hello Tristan and all, > > I have already know that if I want to do this feature(c -> EFI Byte code) > for GCC > I should further modify the GCC front end(parser) to solve the problem (the > size > of pointer is determined at
2010 Mar 19
1
[LLVMdev] Idea for Google Summer Code : C Compiler for EFI Byte Code implement in LLVM
Hello Tristan and all, I have already know that if I want to do this feature(c -> EFI Byte code) for GCC I should further modify the GCC front end(parser) to solve the problem (the size of pointer is determined at run time). I have read a powerpoint about LLVM ( http://llvm.org/pubs/2008-10-04-ACAT-LLVM-Intro.pdf) It is the LLVM-GCC design graph (
2001 Jan 05
0
package e1071 upgrade
Hi, the new version 1.1-0 of package e1071 is now on CRAN. Changes: *) use libsvm 2.1 for support vector machines. We are now also a kind of ``official'' R frontend to libsvm and linked from their homepage at http://www.csie.ntu.edu.tw/~cjlin/libsvm *) new functions for comparing partitions Best, Fritz -.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-
2017 Feb 20
0
Re: "virsh list" hangs
On 17.02.2017 17:18, Yunchih Chen wrote: > > `virsh list` hangs on my server that hosts a bunch of VMs. > This might be due to the Debian upgrade I did on Feb 15, which upgrades > `libvirt` from 2.4.0-1 to 3.0.0-2. > I have tried restarting libvirtd for a few times, without luck. > > Attached below are some relevant logs; let me know if you need some more > for debugging.
2017 Feb 20
0
Re: "virsh list" ahngs
On Sat, Feb 18, 2017 at 12:21:31AM +0800, Yunchih Chen wrote: > >`virsh list` hangs on my server that hosts a bunch of VMs. >This might be due to the Debian upgrade I did on Feb 15, which upgrades >`libvirt` from 2.4.0-1 to 3.0.0-2. >I have tried restarting libvirtd for a few times, without luck. > >Attached below are some relevant logs; let me know if you need some more
2010 Mar 30
0
[LLVMdev] Idea for Google Summer Code : C Compiler for EFI Byte Code implement in LLVM
2010/3/20 Louis Gerbarg <lgerbarg at gmail.com> > On Fri, Mar 19, 2010 at 3:47 PM, Chris Lattner <clattner at apple.com> wrote: > >> >> On Mar 19, 2010, at 11:08 AM, 琬菁楊 wrote: >> >> >> Hello Tristan and all, >> >> I have already know that if I want to do this feature(c -> EFI Byte code) >> for GCC >> I should further