similar to: [LLVMdev] Getting target machine specific information at run-time

Hi, I'm playing with some experimental register allocators for LLVM. One of them needs to build a so-called register class tree for representing the aliasing information among register classes. This tree is not function or module specific. It is actually target specific, because it depends only on the register classes defined for a machine that is used as a target of the current compilation.

Hello, I'm trying to catch assembly output and do some formatting for its presentation while being executed. I face a problem, which is clear from the error, although I have no clue on how to do it otherwise. If generating the code for its asm output and then for jit execution I get: ********** static llvm::MachineFunction& llvm::MachineFunction::construct(const llvm::Function*, const

Hi, Long time ago (llvm-svn june 2008) I asked here about a way to output the assembly code of my JIT generated code to a string, so I could use it to read it on the screen. I came up with this solution: std::string Err; const llvm::TargetMachineRegistry::entry* _arch = llvm::TargetMachineRegistry::getClosestTargetForJIT(Err); std::string FeaturesStr; llvm::TargetMachine*

Well, I've been before hours trying this, but soon after I sent the email I found something. However is quite intriguing. I just changed the order of and the static libraries that I was linking. How can this be possible?? I'm using Cmake for building my llvm projects, so I choose the order and I pick the .a libraries I want to link by hand... Thank you, alvaro 2009/3/8 Álvaro

When you say 'static libraries' do you mean static libraries or shared objects (.so)... Because if you mean shared objects, then it could very well explain you crash. On Mar 9, 12:16 am, Álvaro Castro Castilla <alvaro.castro.casti... at gmail.com> wrote: > Well, I've been before hours trying this, but soon after I sent the > email I found something. However is quite

On Sun, 21 Jan 2007, Marcel Weiher wrote: > just installed the new llvm 1.9 build and noticed that my code no > longer worked. It seems something has changed with > addPassesToEmitFile(). First, the arguments to that method changed so > that it no longer takes a PassManager, but only a > FunctionPassManager. Instead there is a addPassesToEmitWholeFile() > method, but that is

On Wednesday 11 July 2007 15:07, Christopher Lamb wrote: > Could it be possible for there to be a harness type interface that > would allow coalescers that support both modes to be hooked into the > pass registration, and those that depend on the allocator not be > registered as passes? I have a patch for this kind of thing attached. Please take a look and let me know if it looks

On Nov 7, 2007, at 6:10 PM, Antony Blakey wrote: > Hi, > I'm experimenting with using LLVM to generate dynamic FFI bridges > in VisualWorks Smalltalk. LLVM is an amazing thing! I'm going from > dynamically generated assembler source to machine code, and I have > that all working, copied from the llc tool and the JIT example. I > have two questions: > > 1. What

Hi, I'm experimenting with using LLVM to generate dynamic FFI bridges in VisualWorks Smalltalk. LLVM is an amazing thing! I'm going from dynamically generated assembler source to machine code, and I have that all working, copied from the llc tool and the JIT example. I have two questions: 1. What optimization passes, if any, should I run on the module before I pass it to the

Hi folks, just installed the new llvm 1.9 build and noticed that my code no longer worked. It seems something has changed with addPassesToEmitFile(). First, the arguments to that method changed so that it no longer takes a PassManager, but only a FunctionPassManager. Instead there is a addPassesToEmitWholeFile() method, but that is marked as optional, and when I change my code to

Thanks. One question though. Should getMBBFromIndex() assert if given an index out of the range or simply returns a NULL pointer? I would think the later makes it a bit more friendly. Evan On Feb 8, 2008, at 8:59 AM, Roman Levenstein wrote: > Hi Evan, > > Here is a patch for the LiveIntervalAnalysis that we discussed. > > --- Evan Cheng <evan.cheng at apple.com>

Hi folks, just installed the new llvm 1.9 build and noticed that my code no longer worked. It seems something has changed with addPassesToEmitFile(). First, the arguments to that method changed so that it no longer takes a PassManager, but only a FunctionPassManager. Instead there is a addPassesToEmitWholeFile() method, but that is marked as optional, and when I change my code to

On Feb 10, 2008, at 11:44 PM, Roman Levenstein wrote: > Hi Evan, > > --- Evan Cheng <evan.cheng at apple.com> wrote: > >> Thanks. One question though. Should getMBBFromIndex() assert if given >> an index out of the range or simply returns a NULL pointer? I would >> think the later makes it a bit more friendly. > > Yes. It would be more friendly, probably.

Hi Evan, --- Evan Cheng <evan.cheng at apple.com> wrote: > Thanks. One question though. Should getMBBFromIndex() assert if given > an index out of the range or simply returns a NULL pointer? I would > think the later makes it a bit more friendly. Yes. It would be more friendly, probably. I can submit such a patch, if you think it suits better. On the other hand I want to

Yes, global variables are the only way to access shared memory. I'm just trying to get an idea of what you're aiming to accomplish to see if we can improve on the interface here. A MachineFunctionPass runs after instruction selection and relying on doInitialization to run before instruction selection is an implementation detail that I do not believe is guaranteed anywhere (I could be

Is there any way you could approximate the register/instruction usage and perform live-range analysis in a higher-level LLVM IR pass? I'm not sure how useful NVPTXRegisterInfo would be anyway. Unlike backends that target "real" ISAs, these structures do not contain any special properties about registers or instructions, like cost or scheduling information. Are you trying to figure

Can you tell us a bit more about what you're trying to accomplish? Changes to the IR performed during MachineFunctionPass::doInitialization will likely propagate down through code generation, but at that point what is the purpose of using a MachineFunctionPass? You won't have any analysis or instruction information available until runOnMachineFunction. On Mon, Aug 5, 2013 at 12:00 PM,

Does this count have to be exact, or just an accurate approximation? The back-end may add/remove registers fairly late in the codegen process, so if you need an exact count you may need to run *just* before the assembly printer. Perhaps we could introduce a special machine node that represents a shared memory allocation. The node's value would be the shared address space pointer of the

If you're running a MachineFunctionPass, then the code has already been lowered to machine instructions and modifying the original IR will most likely not do what you want. You should only be using the IR as an immutable object for reference. If you want to change the IR, I would suggest using a FunctionPass instead of a MachineFunctionPass. Unless you need codegen data. At the

OK. I know what you mean......... Simply speaking, I want to do some optimizations for PTX, and the information I need is similar to a register allocator. I know PTX is virtual ISA, but I will use PTX as the input of the simulator, gpgpu-sim, so it makes sense. Whether to insert shared memory is depend on the analysis that needs LiveAnalysis, PTX InstrInfo, PTX RegisterInfo, etc. That's why I