similar to: [LLVMdev] mem2reg optimization

Displaying 20 results from an estimated 10000 matches similar to: "[LLVMdev] mem2reg optimization"

2008 Oct 07
0
[LLVMdev] mem2reg optimization
Hi Dan, I don't want to beat a dead horse here, but why would anyone want to use mem2reg after LICM or other passes that can move around loads and stores? I fully understand the design goal to arbitrarily reorder other passes but for mem2reg it actually seems vital to run it as the first pass to make all other passes useful. Anyway, this can definitely also be done with an analysis pass that
2008 Oct 03
3
[LLVMdev] mem2reg optimization
On Thu, October 2, 2008 10:17 am, Nicolas Capens wrote: > Hi all, > > I haven't had a chance yet to do some accurate profiling, but does anyone > have some more insight in the use list order? *bump* I thought this was answered; use lists are not currently in any intentional order. > > It seems very valuable to me (from a performance standpoint) to keep the > use >
2008 Oct 02
0
[LLVMdev] mem2reg optimization
Hi all, I haven't had a chance yet to do some accurate profiling, but does anyone have some more insight in the use list order? *bump* It seems very valuable to me (from a performance standpoint) to keep the use list in (reverse) order. But if this can't be guaranteed it might still be interesting to have some fast variants of passes that do make some assumptions (like my patch for
2008 Sep 24
2
[LLVMdev] mem2reg optimization
Hi Dave, Did that patch of yours ever make it into trunk? I can't seem to find any related checkin for PromoteMemoryToRegister.cpp. I've been doing some extra profiling lately and the RewriteSingleStoreAlloca function alone is taking a whopping 63% of execution time. Thanks! Nicolas -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu]
2008 Sep 25
3
[LLVMdev] mem2reg optimization
Hi Dave, As an exercise I tried to fix this myself, and I think I have a working patch (attached). My own tests are all working wonderfully, and at fantastic performance! I'm looking forward to your patch to see whether we used the same approach or whether things could be improved further. Anyway, I've re-profiled the code and found ComputeLiveInBlocks to be the main hotspot now. Again
2008 Aug 11
0
[LLVMdev] mem2reg optimization
On Monday 11 August 2008 09:58, Nicolas Capens wrote: > Hi all, > > > > While profiling LLVM I noticed that a significant amount of time is spent > in the RewriteSingleStoreAlloca function. Especially for fairly long basic > blocks, linearly searching for uses before a store isn't fast. So I was > wondering if there isn't a faster way to locate these uses? YES! I
2008 Oct 07
0
[LLVMdev] mem2reg optimization
On Oct 7, 2008, at 11:43 AM, David Greene wrote: > On Tuesday 07 October 2008 12:37, Dan Gohman wrote: >> On Tue, October 7, 2008 9:02 am, David Greene wrote: >>> On Tuesday 07 October 2008 00:32, Nicolas Capens wrote: >>>> Anyway, this can definitely also be done with an analysis pass that >>>> provides information about ordering between loads and
2008 Oct 07
0
[LLVMdev] mem2reg optimization
On Tue, October 7, 2008 9:02 am, David Greene wrote: > On Tuesday 07 October 2008 00:32, Nicolas Capens wrote: > >> Anyway, this can definitely also be done with an analysis pass that >> provides information about ordering between loads and stores. It's just > > Actually, no it can't. See the thread about analysis passes depending on > other analysis passes and
2008 Oct 07
2
[LLVMdev] mem2reg optimization
On Tuesday 07 October 2008 12:37, Dan Gohman wrote: > On Tue, October 7, 2008 9:02 am, David Greene wrote: > > On Tuesday 07 October 2008 00:32, Nicolas Capens wrote: > >> Anyway, this can definitely also be done with an analysis pass that > >> provides information about ordering between loads and stores. It's just > > > > Actually, no it can't. See
2008 Sep 26
2
[LLVMdev] mem2reg optimization
Hi Andrew, I can't see any reason not to run mem2reg as the first pass (except maybe run a CFG simplify first, which doesn't alter the use list as far as I know). Also, I doubt that any pass can actually make a valid change in the order of loads and stores. And finally, why would any pass want to change the order of the use list in the first place? Only passes that create new
2004 Nov 29
2
[LLVMdev] Running specific passes
On Friday 26 November 2004 19:56, Chris Lattner wrote: > On Fri, 26 Nov 2004, Vladimir Prus wrote: > > in the implementation of some analysis, I need to change the program and > > then invoke Mem2Reg pass. That pass, in turn, requires other analysis, so > > I must > > Usually you want to do this at a higher level, why not just use 'opt > -yourpass -mem2reg'?
2004 Nov 29
0
[LLVMdev] Running specific passes
On Mon, 29 Nov 2004, Vladimir Prus wrote: > On Friday 26 November 2004 19:56, Chris Lattner wrote: > > On Fri, 26 Nov 2004, Vladimir Prus wrote: > > > in the implementation of some analysis, I need to change the program and > > > then invoke Mem2Reg pass. That pass, in turn, requires other analysis, so > > > I must > > > > Usually you want to do this
2008 Aug 11
3
[LLVMdev] mem2reg optimization
Hi all, While profiling LLVM I noticed that a significant amount of time is spent in the RewriteSingleStoreAlloca function. Especially for fairly long basic blocks, linearly searching for uses before a store isn't fast. So I was wondering if there isn't a faster way to locate these uses? Are there any other known opportunities for optimization? I noticed that register allocation
2008 Sep 24
0
[LLVMdev] mem2reg optimization
On Wednesday 24 September 2008 09:35, Nicolas Capens wrote: > Hi Dave, > > Did that patch of yours ever make it into trunk? I can't seem to find any > related checkin for PromoteMemoryToRegister.cpp. I've been doing some extra > profiling lately and the RewriteSingleStoreAlloca function alone is taking > a whopping 63% of execution time. I will commit it today along with
2008 Oct 07
2
[LLVMdev] mem2reg optimization
On Tuesday 07 October 2008 00:32, Nicolas Capens wrote: > Anyway, this can definitely also be done with an analysis pass that > provides information about ordering between loads and stores. It's just Actually, no it can't. See the thread about analysis passes depending on other analysis passes and when things do and don't get updated by PassManager.
2008 Oct 07
0
[LLVMdev] mem2reg optimization
Hi Chris, Sounds like an excellent generic approach. I'd love to lend a hand to implement it but I'm afraid it involves a little more in-depth LLVM knowledge than what I currently master, so I'll leave it to Dave and you for now... Talking about performance, for me this optimization was the difference between mem2reg taking 63% of execution time, and having it totally
2010 Nov 11
0
[LLVMdev] Landing my new development on the trunk ...
Evan Cheng <evan.cheng <at> apple.com> writes: > Eli is right. We do need to see some benchmark numbers and understand how the pass will fit in the target > independent optimizer. While we encourage contribution, we typically don't commit new passes unless it > introduce new functionalities that have active clients. It would also help if you provide us with compile
2008 Jul 02
0
[LLVMdev] Problem while using mem2reg Optimization
On Wed, Jul 2, 2008 at 10:07 AM, kapil anand <kapilanand2 at gmail.com> wrote: > Hi, > > I am using various LLVM optimization passes and I noticed a strange > behaviour in Mem2Reg Optimization. These pass is used for SSA construction > and basically removed alloca of the corresponding pointers are just used in > load/stores. > So, is there any restriction that all the
2004 Nov 26
0
[LLVMdev] Running specific passes
On Fri, 26 Nov 2004, Vladimir Prus wrote: > in the implementation of some analysis, I need to change the program and then > invoke Mem2Reg pass. That pass, in turn, requires other analysis, so I must Usually you want to do this at a higher level, why not just use 'opt -yourpass -mem2reg'? Alternatively, if you don't want to do that, you can build mem2reg into your pass if it
2013 Mar 03
0
[LLVMdev] Question about method CodeExtractor::severSplitPHINodes
> From: Wei Dang [mailto:jacdang at gmail.com] > Subject: Re: [LLVMdev] Question about method CodeExtractor::severSplitPHINodes > Please excuse me if I'm not supposed to reply to all. You should do reply-all, to make sure the list sees all of the thread. > Are you saying all PHI nodes are required to include all its predecessor blocks > no matter they have input or not?