similar to: [LLVMdev] Using VirtRegMap

Just something to be added: - This procedure doesn''t work with a Fedora 9 DomU - Maybe you have to blacklist some modules in the Dom0: AFAIK you have to rmmod (better: blacklist on boot using modprobe.conf) these modules: serial_core 8250 and 8250_pnp ----- Ursprüngliche Mail ---- Von: Federico Fanton <fake@panizzolo.it> An: xen-users@lists.xensource.com Gesendet: Freitag, den

hey is it possible, that you didn''t assign any drive letters to the second harddrive? please check -> system config -> administration -> computer -> drive manager (i hope the names are correct, i only have a german win2k3). there you can assign drive letters to partitions... hope it helped ----- Ursprüngliche Mail ---- Von: Shanmuga Rajan

Hi all I upgraded my testserver from opensuse 11.1 to 11.2 using zypper based method. All updates went smooth as far as there were no errors during the update process. Rebooting the whole farm the troubles started: not one domU bootet sucessfully, all of them showed the following messages: ... register_blkdev: cannot get major 8 for sd ... Volume group "VGsys" not found before they

Hey folks! I want to add a CentOS 5.2 domU to an existing server (Fedora 8) which was setup by another company. The Dom0 does not provide any other services but a BIND-DHCP-server (they deleted dnsmasq and installed bind). Don''t ask my why they did that. My new DomU is connected to eth0, which is a bridge. BIND also listens on eth0 to serve other machines. I start the install of centos

Hi Duraid, > Hi everyone, > > Quick summary: > > LLVM now has a new register allocator particularly suitable for > compiling (very) large, machine-generated functions. Congrats! Very good job! > Longer story: > > I've recently been using LLVM in an application that involves JITing > > fairly large functions that have no control flow - they're

hi list, after connecting 3 asterisk servers via IAX in a line (+ 1 client at each end), i noticed that call path optimization happens only one time, i.e. only one node/leg in the path can be reduced. Does anybody know if this is the intended behaviour or if it's a bug? Can anyone confirm my observations? It seems that the first node, that sends the TXREQ Message, is "optimized".

>> So, a possible way to encode album art would be: >> >> - a Skeleton stream with appropriate header messages >> - one Kate stream per image, carrying a PNG image >> (alternatively, use Ogg/MNG, if someone brings it from the dead) >> [...] Silvia wrote: >Interesting proposal. Not sure it won't over-complicate album art though... Well yes, of course

Dear all, does anyone of you know how to increase Rs sensitivity to errors? I just migrated back from Matlab and really enjoyed there that Matlab just pops up with (really helpful!) error messages as soon as there is anything slightly wrong with my code. This is certainly anoying on the first run, but really helps to uncover some hidden bugs in the Code. Now I tried artificially to create errors

On Sep 19, 2008, at 2:41 AM, Matt Elder wrote: > I'm trying to piece together a few assignments for a graduate-level > compilers class using LLVM; among these is a register allocator. I'd > like to provide a register allocator that, given a partially-allocated > VirtRegMap, will perform trivial register allocation (as in > RegAllocSimple) on the remaining, unmapped virtual

I'm trying to piece together a few assignments for a graduate-level compilers class using LLVM; among these is a register allocator. I'd like to provide a register allocator that, given a partially-allocated VirtRegMap, will perform trivial register allocation (as in RegAllocSimple) on the remaining, unmapped virtual registers. To make a long story short, I want to map a single

On May 27, 2008, at 5:36 PM, David Greene wrote: > I've been playing around with spillers and found that the > SimpleSpiller fails > badly on a particular code. > > The problem arises because SimpleSpiller does the test > VRM.isAssignedReg(virtReg) which is implemented as: > > 00183 bool isAssignedReg(unsigned virtReg) const { > 00184 if

Hey all, I've found a bug in either the PBQP register allocator or in VirtRegRewriter. I'm observing this assertion in VirtRegRewriter::rewrite() fail: unsigned VirtReg = MO.getReg(); unsigned PhysReg = VRM->getPhys(VirtReg); ... assert(!MRI->isReserved(PhysReg) && "Reserved register assignment"); Indeed there is a case where

I've been playing around with spillers and found that the SimpleSpiller fails badly on a particular code. The problem arises because SimpleSpiller does the test VRM.isAssignedReg(virtReg) which is implemented as: 00183 bool isAssignedReg(unsigned virtReg) const { 00184 if (getStackSlot(virtReg) == NO_STACK_SLOT && 00185 getReMatId(virtReg) == NO_STACK_SLOT)

On Friday 19 September 2008 11:37, Evan Cheng wrote: > Please avoid using VirtRegMap. It's very tied to the current register > allocation pieces and not easily reusable. One of my mission in life > is to kill it. Im surprised to see this. I found it rather easy to re-use for custom register allocators. -Dave

On May 8, 2008, at 11:36 AM, David Greene wrote: > I just updated from upstream llvm as of about last Thursday and I'm > getting a segfault in VirtRegMap::RemoveMachineInstrFromMaps. > It seems that the particular instruction being removed happens > to reference an object at stack slot 4. The first spilled register is > assigned stack slot 6 so LowSpillSlot == 6. Then, when

On Thursday 08 May 2008 16:25, Evan Cheng wrote: > > Since we're hooking up llvm to custom code, I want to check > > assumptions. > > Is there anything in llvm-gcc or the other llvm tools that could > > generate a > > stack slot reference like this before register allocation? > > Basically, I'm > > Codegen can definitely create stack slots during

I just updated from upstream llvm as of about last Thursday and I'm getting a segfault in VirtRegMap::RemoveMachineInstrFromMaps. It seems that the particular instruction being removed happens to reference an object at stack slot 4. The first spilled register is assigned stack slot 6 so LowSpillSlot == 6. Then, when we try to erase from SpillSlotToUsesMap, we index with a negative number.

The following code in VirtRegMap.cpp is asserting in the C++ library because back() is called on an empty container: /// addLastUse - Add the last use information of all stack slots whose /// values are available in the specific register. void addLastUse(unsigned PhysReg, MachineInstr *Use) { std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(PhysReg);

Yeah, I think so. It should be pretty simple to fix though. Can you provide a patch? Or please fix a bug. Evan On May 8, 2008, at 2:32 PM, David Greene wrote: > On Thursday 08 May 2008 16:25, Evan Cheng wrote: > >>> Since we're hooking up llvm to custom code, I want to check >>> assumptions. >>> Is there anything in llvm-gcc or the other llvm tools that

Hi, I would like to see how model.matrix expands factor column to a set of dummy columns. I think that is done int .Internal(model.matrix(t, data)) which is called from model.matrix.default. But I have not idea how I can look at this function. How can I get to such internal functions? Thanks so much! Werner ____________________________________________ einen herausragenden Schutz gegen