similar to: [LLVMdev] ReplaceUses: curious

Hello, I am trying to compile some code to LLVM IR with a simple "__thread int x" but hitting this error: test.cpp:1:1: error: thread-local storage is unsupported for the current target I'm using both the -S and -emit-llvm options on clang, and was expecting to see "@x = thread_local global i32 0" come out of clang. I am curious why clang even cares about this since

Hi I am interested in developing a new target for LLVM and wanted to check where my new code should reside. Should I just add a new sub-directory to lib/Targets and populate that with the necessary files? I am using ARM as a template, as I am most familiar with that architecture, so I assume copying files from that directory is a good starting point. I have tried a trivial build of a new

Hi all LLVMdev! Here is a question: I try to understand how I can realize a debugging in LLVM!? I have written a back end for my target and now I need a debug. I asked developers Chris Lattner and Robert L. Bocchino. They recommend me ask the LLVMdev. Is there a tool like "llvm-db" about Robert said? Here a mail from Robert: On Jun 29, 2009, at 17:14 PM, Robert L. Bocchino

Hi, I am working on support R_MIPS_HI16 / R_MIPS_LO16 in the new LLD and have a couple of questions. == Q1 In case of MIPS O32 ABI we have to find a matching R_MIPS_LO16 relocation to calculate R_MIPS_HI16 one because R_MIPS_HI16 uses combined addend (AHI << 16) + (short)ALO where AHI is original R_MIPS_HI16 addend and ALO is addend of the matching R_MIPS_LO16 relocation [1]. There are two

Hi, During instruction selection, I have the following code for certain LOAD instructions: const LoadSDNode *LD = cast<LoadSDNode>(N); SDNode* LDW = CurDAG->getMachineNode(AVR::LDWRdPtr, SDLoc(N), VT, PtrVT, MVT::Other, LD->getBasePtr(), LD->getChain()); // Honestly, I have no idea what this does, but other memory // accessing instructions

On 7/29/2017 1:28 AM, Dr. ERDI Gergo via llvm-dev wrote: > Hi, > > During instruction selection, I have the following code for certain > LOAD instructions: > > const LoadSDNode *LD = cast<LoadSDNode>(N); > SDNode* LDW = CurDAG->getMachineNode(AVR::LDWRdPtr, SDLoc(N), > VT, PtrVT, MVT::Other, > LD->getBasePtr(), LD->getChain()); >

Hello I have a strange issue, I''m having a setup with 24 disk enclosure connected with LSI3801-R. I created two pools. Pool have 24 healthy disks. I disabled LUN persistency on the LSI adapter. When I cold boot the server (power off by pulling all power cables), a warning is shown on the console during boot: .... WARNING: /pci/path/ ... (mpt0): wwn for traget has changed

Could we expose predicates defined in the target InstrInfo.td file to the MachineVerifier? We use BuildMI() to create many instructions after ISEL, but the predicates are not being checked at this point. Thus, I could forget to check the target and build an instruction that is illegal for a specific configuration. In such a case it would be nice if the MachineVerifier could detect this for me.

https://bugzilla.mindrot.org/show_bug.cgi?id=2688 Bug ID: 2688 Summary: Long log messages to stderr missing newlines Product: Portable OpenSSH Version: 7.4p1 Hardware: All OS: Linux Status: NEW Severity: minor Priority: P5 Component: sshd Assignee: unassigned-bugs at

A basic question, but one that eludes me. I have created a new variable $numurder, which I have rounded off. I want to save the rounded off version of this variable to an existing datafile called 'ngri.csv' . numurder <-c((murder*no.of.cases)/100) [[1]] [1] 48.952 112.073 182.160 974.610 122.140 663.432 150.856 18.988 137.925 198.045 68.930 203.148 30.056 100.955

Right, it's failing when it tries to materialize a move of a constant into a register. But it's only trying to do that because it previously failed to fold the constant into the AND. What you need to do is step through the path it takes when matching the AND node, and try to figure out why it ends up selecting the register-register version rather than the register-immediate version.

Hello, Below is the code for a basic bar graph. I was seeking advice regarding the following: (a) For each time period there are values from 16 people. How I can change the colour value so that each person has a different colour, which recurs across each of the three graphs/tie epriods? (b) I have seen much more sophisticated examples using lattice (e.g each person has a separate

Hello, Thanks to recent changes in the SVN, I was able to successfully build LLVM under Windows in the following environments: 1. Cygwin; 2. MinGW/MSYS; 3. "gcc -mno-cygwin" (a.k.a MinGW on Cygwin). For 3., I've had to make a few manual changes to the build system. Care is needed because non-Cygwin external commands require Windows paths and Cygwin's make does not like path

Hi Artem, GDB only works with native applications. If you compile your code to a native executable with -g, then debug info should work for you. However, if you've built your own backend, then you may need to add the debug info hooks etc. If you have further questions, please email the llvmdev mailing list instead of me directly, thanks! -Chris On Jun 26, 2009, at 11:11 AM,

I am trying to create a barplot displaying the sums of 2 columns of data grouped by a variable. the data is set up like this: "city" "n" "y" <br> mon 100 200 <br> tor 209 300 <br> edm 98 87 <br> mon 20 76 <br> tor 50 96 <br> edm 62 27 <br> the resulting plot should have city as the x-axis, 2 bars per city, 1 representing

Thanks Anton and Krzysztof! Here is the dump using the -debug flag. At this point I am not making much sense of this, would it be too much to ask if one of you could walk me through one of these lines? One thing that I didn't point out is that I never defined any separate floating point registers, not sure if this will pose any issue? Thanks again for your time! Jeff jeff at

Hallo, LLVMdev! I have found you in LLVM Developers page (http://llvm.org/developers.cgi). First thank you for all of your work with LLVM. About: I work with the LLVM Compiler Infrastructure to implement a backend for specific processor xPEC of chip NetX (http://hilscher.com/netx.html). So C-code already possible compile to the native xPEC assembly code (works perfect! LLWM a big

Hi, I have tried to genertae the key with ssh-keygen -P ( remove the passphrase) And copied it to the traget system. However, it doesn't work. Any insite with the way I am distributing the script. Gs -----Original Message----- From: Martin Pool [mailto:mbp@samba.org] Sent: Tuesday, July 23, 2002 6:53 PM To: Kar, Gouri X. -ND Cc: rsync@lists.samba.org; Johnson, Gary X. -ND; Minyard, Mark X.

Hi Talin, I had a talk in London developer meeting about More Target Independent Bitcode. (You can download the slides from http://llvm.org/devmtg/2011-09-16/) I have been also trying to make bitcode with more higher abstraction level. I made new compilation strategy using more target indepent bitcode as followins, (This didn't consider about Jit or Interpreter like lli) C/C++ source code

Hi, After creating and distributing the private key with "ssh-keygen -P", I am till getting the following error message while I schedule from cron. Only exception is right now , I have only one message which says "You have no controlling tty and no DISPLAY. Cannot read passphrase". Any help is appreciated. Gs You have no controlling tty and no DISPLAY. Cannot read