Displaying 20 results from an estimated 300 matches similar to: "[LLVMdev] Conditonal to constant promotion?"
2010 Jul 30
2
conditonal "if"
Hi,
I have problem with my R program. Actually, it just a simple program, but I do
not know the error is. Here is part of my program:
....
if (tau2ca==0) {MVvc <- 0.01} else {MVvc <- tau2ca}
ri_vc <- si2/MVvc
vi_vc <- ri_vc + 1
Y_bar_vc <- sum(y/vi_vc)/sum((1/vi_vc))
tau2MVvc <- sum((1/vi_vc)*(y - Y_bar_vc)^2)/(k-1)
....
But then, there is an error displayed in workspace
2011 Apr 29
1
Conditonal Rank
Suppose I have data such as
tmp <- data.frame(score = c(1,2,3,4, 4,3,2,1), trial = gl(2,4), Gender = gl(2,2,8, labels=c('M', 'F')))
Now I would like to compute a rank on the variable score conditional on trial and gender. I could do
res <- with(tmp, tapply(score, list(Gender, trial), rank))
res[,1]
res[,2]
and then finagle a way to create a new variable in the dataframe
2010 Mar 04
1
extracting values conditonal on other values
Dear R helpers,
I have a dataframe (test1) containing the time of sunrise and sunset for each day of the year
for 3 years. I have another dataframe (test2) containing measurements that are taken every
15 minutes, 24/7. I would like to extract all rows from test2 that occur between sunrise and
sunset for the appropriate date. Can you suggest a good vectorized way to do this? Keep in
mind
2013 Jul 05
0
[LLVMdev] Enabling vectorization with LLVM 3.3 for a DSL emitting LLVM IR
On Jul 5, 2013, at 9:50 AM, Stéphane Letz <letz at grame.fr> wrote:
>
> Le 5 juil. 2013 à 04:11, Tobias Grosser <tobias at grosser.es> a écrit :
>
>> On 07/04/2013 01:39 PM, Stéphane Letz wrote:
>>> Hi,
>>>
>>> Our DSL can generate C or directly generate LLVM IR. With LLVM 3.3, we can vectorize the C produced code using clang with -O3, or
2013 Jul 05
2
[LLVMdev] Enabling vectorization with LLVM 3.3 for a DSL emitting LLVM IR
Le 5 juil. 2013 à 17:23, Arnold Schwaighofer <aschwaighofer at apple.com> a écrit :
>
> On Jul 5, 2013, at 9:50 AM, Stéphane Letz <letz at grame.fr> wrote:
>
>>
>> Le 5 juil. 2013 à 04:11, Tobias Grosser <tobias at grosser.es> a écrit :
>>
>>> On 07/04/2013 01:39 PM, Stéphane Letz wrote:
>>>> Hi,
>>>>
2009 Mar 09
0
[LLVMdev] setting conditons (flags) with arithmetic instructions and conditional branching
Hi all,
I'm pretty new to the community, but I've run into a number of
questions while building a backend for a custom target. I'll keep it
to one topic per thread, though.
My target has arithmetic instructions (add, sub, etc...) which all set
the flags register. There is no explicit comparison instruction for my
target. The conditional branching instructions check the flags
2009 Mar 09
0
[LLVMdev] setting conditons (flags) with arithmetic instructions and conditional branching
Hi all,
I'm pretty new to the community, but I've run into a number of
questions while building a backend for a custom target. I'll keep it
to one topic per thread, though.
My target has arithmetic instructions (add, sub, etc...) which all set
the flags register. There is no explicit comparison instruction for my
target. The conditional branching instructions check the flags
2018 Mar 28
0
[PATCH] drm/nouveau/bios/init: fix spelling mistake: "CONDITON" -> "CONDITION"
From: Colin Ian King <colin.king at canonical.com>
Trivial fix to spelling mistake in warning message text
Signed-off-by: Colin Ian King <colin.king at canonical.com>
---
drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c
2019 May 14
2
[PATCH] drm/nouveau/bios/init: fix spelling mistake "CONDITON" -> "CONDITION"
From: Colin Ian King <colin.king at canonical.com>
There is a spelling mistake in a warning message. Fix it.
Signed-off-by: Colin Ian King <colin.king at canonical.com>
---
drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c
2013 Jul 05
2
[LLVMdev] Enabling vectorization with LLVM 3.3 for a DSL emitting LLVM IR
Le 5 juil. 2013 à 04:11, Tobias Grosser <tobias at grosser.es> a écrit :
> On 07/04/2013 01:39 PM, Stéphane Letz wrote:
>> Hi,
>>
>> Our DSL can generate C or directly generate LLVM IR. With LLVM 3.3, we can vectorize the C produced code using clang with -O3, or clang with -O1 then opt -O3 -vectorize-loops. But the same program generating LLVM IR version cannot be
2013 Feb 14
1
[LLVMdev] LiveIntervals analysis problem
Hello everyone,
please I need your help.
To reproduce my problem I created simple pass for backends (TestPass.cpp
in attached files). That pass I call from Mips backend in this way
(MipsTargetMachine.cpp):
bool MipsPassConfig::addPreRegAlloc() {
addPass(createTestPass());
return false;
}
The problem becomes, when I am trying compile file ldtoa.ll (in attached
files). Compiling
2006 May 02
5
listing parents from child conditon
Hi,
How can I grab all parents in a table, depending on a condition in the
children table ?
Fx.
def list
@projects = Project.find(:all)
end
will find all projects in my table. Now let''s say I want show a similar
list, for all open projects.. I define an open project, as all lines
(Line has belongs_to :Project) that do not yet have a closed_at
timestamp set.
So basically, I want
2007 Sep 28
3
[LLVMdev] Crash on accessing deleted MBBs (new backend)
Hi,
I'm trying to write up my little m68k backend things have been going
smoothly. I've been working with the x86 backend as a template, fixing
things as I go.
Now I've run into branches and I have a crash I don't really
understand. Here's the sample IR I'm running llc on to generate
assembly:
define i32 @ilog2(i32 %x) {
entry:
%tmp718 = icmp eq i32 %x, 0
2009 Aug 28
1
[LLVMdev] va_arg
I would like to be able to instrument va_arg, but when I generate a bc
file for a test case using:
llvm-gcc -O3 -emit-llvm vararg.c -c -o vararg.bc
I do not see va_arg. Instead, it seems the args are accessed through
%struct.__va_list_tag, which makes things a bit trickier to
instrument. Is there a way to force llvm-gcc to use va_arg?
Perhaps there is some documentation about va_list_tag or
2008 Jan 04
0
[LLVMdev] Extraction of Arguments Passed to a Function
Hi,
I am trying to extract the name of the variables passed as an Argument to a
Function. I am using a runOnFunction Pass.
For example in the following IR respresentation,
define void @foo(i32 %limit) {
entry:
--
--
}
I should be able to walk the IR and get '%limit' as the external variable
passed to the function.
Another question, Is it possible to create a basic symbol table (
2010 Nov 17
1
[LLVMdev] Copy Instruction from one Basic block to another
I want to do the following:
suppose the program structure:
bb
/ \
bb1 bb2
\ /
bb3
2009 Jan 06
2
[LLVMdev] LLVM Optmizer
The following C code :
#include <stdio.h>
#include <stdlib.h>
int TESTE2( int parami , int paraml ,double paramd )
{
int varx=0,vary;
int nI =0;
//varx= parami;
if( parami > 0 )
{
varx = parami;
vary = varx + 1;
}
else
{
varx = vary + 1;
vary = paraml;
}
varx = varx + parami + paraml;
for( nI = 1 ; nI <= paraml; nI++)
{
varx =
2009 Sep 06
0
[LLVMdev] Non-local DSE optimization
Jakub Staszak wrote:
> Hi,
>
> It looks like PDT.getRootNode() returns NULL for:
>
> define fastcc void @c974001__lengthy_calculation.
> 1736(%struct.FRAME.c974001* nocapture %CHAIN.185) noreturn {
> entry:
> br label %bb
>
> bb:
> br label %bb
> }
>
>
> Isn't it a bug in PostDominatorTree?
>
> Please note that this crashes:
>
2008 Dec 04
0
[LLVMdev] 32bit math being promoted to 64 bit
instcombine doesn't seem to be doing it. From my testing it seems to
only occur when I use -indvars after a long string of commands.
For example:
llvm-as < test_fc_27.ll | opt -preverify -domtree -verify
-lowersetjmp -raiseallocs -simplifycfg -domtree -domfrontier
-mem2reg -globalopt -globaldce -ipconstprop -deadargelim
-instcombine -simplifycfg -ba
siccg -prune-eh -inline
2009 Sep 08
2
[LLVMdev] Non-local DSE optimization
Hello,
Bug is already fixed by Chris (see: http://llvm.org/bugs/show_bug.cgi?id=4915)
.
I added getRootNode() == NULL condition to my patch. It's not a great
solution, but it is enough for now I think. New patch attached.
-Jakub
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