similar to: [LLVMdev] SSA or not SSA?

[ sorry for the late reply ] Patrick Meredith <pmeredit at uiuc.edu> wrote: > All register uses are SSA. Memory is not in SSA. The mem2reg pass > which promotes stack variables to registers effectively converts non- > SSA to SSA. There was a reg2mem pass, written by Andrew Lenharth, I'm > not sure if it's still being maintained. What is the difference between

All register uses are SSA. Memory is not in SSA. The mem2reg pass which promotes stack variables to registers effectively converts non- SSA to SSA. There was a reg2mem pass, written by Andrew Lenharth, I'm not sure if it's still being maintained. On Jul 7, 2008, at 8:47 AM, Matthieu Moy wrote: > Hi, > > Silly question from an LLVM newbie: the LLVM LRM say that the

Memory is what the i32* points too. The i32* itself is in a register. You can store to it as many times as you want, but you can't change the address, because that would violate SSA. On Jul 17, 2008, at 4:26 AM, Matthieu Moy wrote: > [ sorry for the late reply ] > > Patrick Meredith <pmeredit at uiuc.edu> wrote: >> All register uses are SSA. Memory is not in SSA.

Patrick Meredith <pmeredit at uiuc.edu> writes: > Memory is what the i32* points too. The i32* itself is in a > register. You can store to it as many times as you want, but you > can't change the address, because that would violate SSA. Thanks, For the record, I finally understood by making a few experiments: This is (obviously) valid: define i32 @main() {

On Thu, Jul 17, 2008 at 6:34 AM, Matthieu Moy <Matthieu.Moy at imag.fr> wrote: > Patrick Meredith <pmeredit at uiuc.edu> writes: > >> Memory is what the i32* points too. The i32* itself is in a >> register. You can store to it as many times as you want, but you >> can't change the address, because that would violate SSA. > > Thanks, > > For the

Hi, Sorry if this question has been asked earlier: Is the -reg2mem the pass to convert SSA form of LLVM IR to non-SSA form (ie, eliminate all phi-functions from LLVM IR) ? I tried it with a small example and it did remove all the phi function, I just wanted to confirm that the pass guarantees to remove all phi functions. Also, assuming I have this pass as a required pass, is it safe to clone

Hi , I am trying to clone a BasicBlock. I want both to co-exist and I have introduced a conditional branch to the original or the cloned BB. I tried mapping the original instruction and the clone as below : Instruction *NewInst = II->clone(); if (II->hasName()) NewInst->setName(II->getName()); NewBB->getInstList().push_back(NewInst); ValueMap[II] =

Hi, I am emitting llvm bit code using llvm-gcc -c -emit-llvm -O0 -o test.bc test.c and then optimizing it with opt -O3 -print-module test.bc in order to obtain a dump of generated IR. The resulting code has Phi nodes and is perhaps in SSA form. I want to undo the SSA form while retaining all the other optimizations. Is mem2reg the right optimization to be added after -O3, i.e., opt -O3

Hi, is there a opt pass that replaces the SSA virtual registers to stack-variables? I want to eliminate the SSA virtual register from my IR. Kindly suggest BR/Nizam -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140201/bdc3909a/attachment.html>

Hi Ben, That did help. I continue to notice the virtual register in the program. I use LLVM 3.4. The program i am looking at is a very simple one. Listed below int global_var; int *global_ptr; int32_t main(int32_t argc, char ** argv){ int p = 10; int k = 20; int *pp; char *c_pp; pp = &k; global_ptr = pp; pp = &p; global_ptr = &global_var; return 0; } BR/Nizam

On 01/22/2011 10:30 PM, Surinder wrote: > Hi, > > I am emitting llvm bit code using > > llvm-gcc -c -emit-llvm -O0 -o test.bc test.c > > and then optimizing it with > > opt -O3 -print-module test.bc > > in order to obtain a dump of generated IR. > > > The resulting code has Phi nodes and is perhaps in SSA form. I want > to undo the SSA form while

Hello Andrew , Yes , I have missed the phi node since my paths merge together. I'll try this out. I am implementing a timer based profiling scheme and hope your code will be useful for me. Please send me a copy of your code. Thanks Sandra Andrew Lenharth <andrewl at lenharth.org> wrote: On Tue, 2005-11-22 at 09:12 -0800, Sandra Johnson wrote: > Hi , > I am trying

On Tue, 2005-11-22 at 09:12 -0800, Sandra Johnson wrote: > Hi , > I am trying to clone a BasicBlock. I want both to co-exist and I have > introduced > a conditional branch to the original or the cloned BB. I have a pass I haven't commited that does just this. Well, it does so to implement Arnold and Ryder style profiling. I can send you a copy of that if you want (I hope to

Hi, Diego, Thanks for your quick reply. Inserting a copy instruction may not work here because I have a limitation of virtual register number. I need to assign registers with ssa form to registers without ssa form. I will look the source code you point out. Thanks Xiangyang On Fri, Apr 24, 2015 at 4:19 PM, Diego Novillo <dnovillo at google.com> wrote: > > > On Fri, Apr 24, 2015

greened at obbligato.org (David A. Greene) writes: > Actually git pull can sometimes get you into trouble. Probably git > fetch / git rebase is the better combination for LLVM. I don't get it. Doesn't "git pull --rebase" do exactly a fetch followed by a rebase? -- Matthieu Moy http://www-verimag.imag.fr/~moy/

Matthieu Moy <Matthieu.Moy at grenoble-inp.fr> writes: > greened at obbligato.org (David A. Greene) writes: > >> Actually git pull can sometimes get you into trouble. Probably git >> fetch / git rebase is the better combination for LLVM. > > I don't get it. > > Doesn't "git pull --rebase" do exactly a fetch followed by a rebase? No. It does

On Wed, Oct 3, 2012 at 10:15 AM, Matthieu Moy <Matthieu.Moy at grenoble-inp.fr> wrote: > Preston Briggs <preston.briggs at gmail.com> writes: >> Think about costs asymptotically; that's what matters. Calls and >> returns require constant time, just like addition and multiplication. > > Constant time, but not necessarily constant memory. > > Deep recursion

LLVM IR is always in SSA form. If you *really* don't want it to be, use allocas for everything and then don't run the mem2reg optimization pass. This will represent all of your variables as stack locations instead of registers, and it will not be SSA. Reid On Sat, Sep 26, 2009 at 3:55 PM, ivtm <martinaide1 at yahoo.com> wrote: > > I tried the -O0 option and I am still

I tried using the mem2reg pass with opt, e.g. opt -reg2mem x.bc > x2.bc where x.bc was produced with: llvm-gcc -O2 -emit-llvm -c x.c -o x.bc This did not reduce the # of variables in x2.bc I use -O2 because it produces the least # of instructions and hence the least # of new SSA virtual registers. Do you have a set of options to give to llvm-gcc or opt in mind ? My goal is to take a .c

Matthieu Moy <Matthieu.Moy at grenoble-inp.fr> writes: > dag at cray.com (David A. Greene) writes: > >> Jason Kim <jasonwkim at google.com> writes: >> >>> I believe git has a similar system for maintaining "branches of patches"  >> >> A pointer/tutorial on how to do this would be most welcome. > > It depends on the definition of