similar to: [LLVMdev] Regarding ARM CodeGen

Hi Evan, Thanks for the answers. I had few more queries though. 1. As far as I was able to understand the Codegen infrastructure, ARMInstrInfo.td file has complete description of the instructions which modify the status flags. For example, we have description for both ADD and ADDS. But the problem is that in LLVM, we have a single "ADD" Instruction. Thus when we do getDesc(add), we get

On Jul 14, 2008, at 12:59 PM, kapil anand wrote: > Hi all, > > I am using LLVM compiler and CodeGen for generating ARM binaries. > > I was going through the code for ARM backend. I noticed that the ARM > Condition field( Bits 31-28) is generated by converting the > conditions used in icmp and branch. For example, if I have following > C Code > > int a,b,c,d;

On Jul 14, 2008, at 5:10 PM, kapil anand wrote: > Hi Evan, > > Thanks for the answers. I had few more queries though. > > 1. As far as I was able to understand the Codegen infrastructure, > ARMInstrInfo.td file has complete description of the instructions > which modify the status flags. For example, we have description for > both ADD and ADDS. But the problem is

Hi, I have one more query regarding the LLVM representations. In LLVM Infrastructure, "label" is defined as Primitive type. So, is there any way of using a variable of Type Label in some arithmetic operation or in "bitcast" instruction. I tried the following code: *label %X1: X1: %y = bitcast label %X1 to i32 %tmp1 = add i32 %y,2* llvm-as gave me an error that:

Hi Gordon, I am trying to represent ARM instruction in LLVM. In ARM ISA, PC is itself a General Purpose Register and we can have following kind of instruction R3 = ADD PC, R2 Since label in LLVM corresponds to current position and thus is like a logical Program Counter. I was trying to implement the above instruction by using label as an arguement to LLVM Add instruction, based on the

On 2008-07-15, at 11:35, kapil anand wrote: > I have one more query regarding the LLVM representations. In LLVM > Infrastructure, "label" is defined as Primitive type. So, is there > any way of using a variable of Type Label in some arithmetic > operation or in "bitcast" instruction. > > Is there any other way to use label in arithmetic operations. I am

Hi all, I have an ARM virtual machine with ubuntu and want to port LLVM over that. In release documents, ARM is not in the list of supported platforms. I tried to compile LLVM on ARM platform and ran into an error. Has anyone tried to port LLVM onto ARM before? Is it going to require lots of changes? Thanks --Kapil -------------- next part -------------- An HTML attachment was scrubbed...

The Compilation error I am getting: "Error while compiling ARMJITInfo.cpp.. Selected processor does not support fstmfdd sp!,{d0,d1,d2,d3,d4,d5,d6,d7}.... On Thu, Sep 24, 2009 at 8:45 PM, kapil anand <kapilanand2 at gmail.com> wrote: > Hi all, > > I have an ARM virtual machine with ubuntu and want to port LLVM over that. > In release documents, ARM is not in the list of

Hi Devang, GlobalModRefPass is also a ModulePass and it uses CallGraph Analysis. So, I think it should not necessary to extend CallGraphSCCPass to use CallGraph information. Module Pass shoule be sufficient... --Kapil On 10/8/08, Devang Patel <dpatel at apple.com> wrote: > Hi Kapil, > > On Oct 8, 2008, at 10:19 AM, kapil anand wrote: > >> Hi all, >> >> I

Hi Kapil! LLVM both builds and runs fine on ARM Linux. I am running a public buildbot for the llvm project that are compiling and testing llvm on arm-linux daily and this machine are running Ubuntu Jaunty. http://google1.osuosl.org:8011/builders/llvm-arm-linux I have successfully compiled LLVM on ARM using GCC 4.3.3 on a Ubuntu Jaunty system and GCC 4.4 on a Ubuntu Karmic system. Do you use

Media instructions like - parallel add and subtract, Sign/Zero Extend and Add instructions seem to be missing from ARM target support. These instructions are not listed in GenInstrNames.inc Kapil On Fri, Oct 10, 2008 at 11:54 AM, Evan Cheng <evan.cheng at apple.com> wrote: > > Can you give some examples of missing instructions? > > Evan > > On Oct 9, 2008, at 4:58 PM,

My god! I would love a branch predictor! It would simplify many aspects of my register allocator. Second, I am surprised it did not make it into the tree. Since more is being done with register allocation as a while "RegAllocBasic" was just put in, I hope this is looked at again. Do you have a working svn copy? Also, could you send me a copy/link to that '94 paper off the list

Hello Kapil, I have implemented a static profiler for LLVM as a google summer of code project in 2009. I wrote it for the 2.4 branch, but the implementation never made into the tree. I have recently ported it to LLVM 2.8, but I haven't tested it. You can take a look at the code from: http://homepages.dcc.ufmg.br/~rimsa/tools/stprof-llvm.patch The implementation is based on Wu's

Specifically, I need a way to represent indirect branch instruction (in binary) as an equivalent LLVM instruction. With switch instruction , I would have to list all the possible targets and then initialize the corresponding instruction. I was just thinking whether it might be possible to have some kind of indirect branch where label is a "variable" and not an explicit label present in

On Oct 8, 2008, at 10:59 AM, kapil anand wrote: > Hi Devang, > > GlobalModRefPass is also a ModulePass and it uses CallGraph Analysis. > So, I think it should not necessary to extend CallGraphSCCPass to use > CallGraph information. Module Pass shoule be sufficient... ok, but you're Registering your pass in CallGraph Analysis group. What if you remove

You said it was expensive, but if you had to put a big-o estimate on it, what would it be? -Thanks Jeff Kunkel On Tue, Nov 2, 2010 at 8:54 PM, Andrei Alvares <logytech at gmail.com> wrote: > Hello Jeff, > > On Tue, Nov 2, 2010 at 9:17 PM, Jeff Kunkel <jdkunk3 at gmail.com> wrote: > > My god! I would love a branch predictor! It would simplify many aspects > of >

Hello, on the problems cross-building compiler-rt: Tried to follow https://llvm.org/docs/HowToCrossCompileBuiltinsOnArm.html which lead to this cmake: cmake -G "Ninja" ../llvm/projects/compiler-rt/ -DCOMPILER_RT_BUILD_BUILTINS=ON -DCOMPILER_RT_BUILD_SANITIZERS=OFF -DCOMPILER_RT_BUILD_XRAY=OFF -DCOMPILER_RT_BUILD_LIBFUZZER=OFF -DCOMPILER_RT_BUILD_PROFILE=OFF

Hi all, I need a new kind of analysis on LLVM Module, so I made a new pass to do this. This new pass extends the ModulePass class and follows the conventions used in GlobalModRefPass, which is also a Module Pass.I need the CallGraph analysis for this pass, hence I have added (addRequired(CallGraph)) in getAnalysisUsage function of this new pass. I also added it to CallGraph Analysis group through

I have one more question regarding ARM codegen support. Is it possible to pass a flag to Codegen to generate only ARMv5 instructions and not to use instructions from higher versions, ( In other words, is this version specific information present in LLVM codegen?) Thanks Kapil On Fri, Oct 10, 2008 at 10:12 PM, Chris Lattner <clattner at apple.com> wrote: > > On Oct 10, 2008, at

Hi all, Does LLVM infrastructure contain implementation of any static profiling algorithm apart from "Spill-Weight" calculation present in Live Intervals class? The future work page does suggest implementation of some "static profiling" algorithms to make an educated guesses about the relative execution frequencies of various parts of the code. Thanks --Kapil --------------