similar to: [LLVMdev] Recently failing vector tests

Displaying 20 results from an estimated 600 matches similar to: "[LLVMdev] Recently failing vector tests"

2008 Jun 30
2
[LLVMdev] Recently failing vector tests
Hi Dale, yes it's just stack alignment. Unfortunately your patch doesn't make any difference. Thanks for thinking about this, Duncan. On Friday 27 June 2008 19:51:00 Dale Johannesen wrote: > On Jun 27, 2008, at 3:11 AMPDT, Duncan Sands wrote: > > FAIL: test/CodeGen/X86/vec_shuffle-10.ll > > Failed with exit(1) at line 3 > > while running: llvm-as <
2008 Jun 27
0
[LLVMdev] Recently failing vector tests
On Jun 27, 2008, at 3:11 AMPDT, Duncan Sands wrote: > FAIL: test/CodeGen/X86/vec_shuffle-10.ll > Failed with exit(1) at line 3 > while running: llvm-as < test/CodeGen/X86/vec_shuffle-10.ll | llc - > march=x86 -mattr=+sse2 | not grep {sub.*esp} > subl $16, %esp > subl $16, %esp > child process exited abnormally Is the code actually loading and storing
2008 Jun 30
0
[LLVMdev] Recently failing vector tests
On Jun 30, 2008, at 9:25 AMPDT, Duncan Sands wrote: > Hi Dale, yes it's just stack alignment. Unfortunately > your patch doesn't make any difference. > > Thanks for thinking about this, > > Duncan. OK, the test is not quite right then. This doesn't happen on Darwin so I'm afraid you'll have to debug it. Perhaps testing for
2008 Jun 30
1
[LLVMdev] Recently failing vector tests
Hi Dale, > OK, the test is not quite right then. This doesn't happen on Darwin > so I'm > afraid you'll have to debug it. Perhaps testing for > (RegInfo->needsStackRealignment(Fn) && > FFI->getObjectIndexEnd()!=0) > ? yes, that works - thanks! Since I have no idea what this is doing, is it ok if I leave it to you to commit it?
2017 Apr 27
4
-msave-args backend support for x86_64
ola, ive been looking at adding support for an -msave-args option for use on x86_64. the short explanation of it is that it makes x86_64 function prologues store their register arguments on the stack. the purpose of this is to make the arguments trivially accessible for things like stack traces with arguments. as per https://blogs.oracle.com/sherrym/entry/obtaining_function_arguments_on_amd64,
2017 Mar 30
2
InstructionSimplify: adding a hook for shufflevector instructions
Thanks, Sanjay, that makes sense. The opportunity for improving instcombining splat sounds promising. Another question about shuffle simplification. This is a testcase from test/Transforms/InstCombine/vec_shuffle.ll: define <4 x i32> @test10(<4 x i32> %tmp5) nounwind { %tmp6 = shufflevector <4 x i32> %tmp5, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32
2012 Nov 27
1
[LLVMdev] strange dbgs() behavior: unable to print floats in machine backend
Hi Craig, I updated from the trunk some minutes ago, and thus got the "explicit". PrintReg constructor. When I do not include raw_ostream.h after including Debug.h in the backend cpp files, I now get compilation errors, not only when trying to print floats but also in other places. For example, for the code bool ADRESRegisterInfo::hasReservedCallFrame(const MachineFunction &MF)
2017 Aug 15
2
Problem of getting two unused registers in eliminateFrameIndex()
Hello all, For my custom processor backend I am trying add some instruction using BuildMI() inside eliminateFrameIndex(). I tried RegScavenger like this: unsigned RegUnused0 = RS->FindUnusedReg(&LASER::GNPRegsRegClass); if (!RegUnused0) RegUnused0 = RS->scavengeRegister(&LASER::GNPRegsRegClass, II, SPAdj); assert(RegUnused0 && "Register scavenger failed");
2016 Feb 01
2
TableGen customized node with mayStore attribute is deleted if there is no use
Hi, I define a customized node with customized type. The job of this customized node is to move a value from one register class to another class. I find that if there is no use of the destination register, this node will be deleted from SDAG. For some reasons, I want to keep this node. So I attach mayStore attribute to this node and I hope it will not be deleted. However, it does not work like I
2011 Jan 20
3
Polycom 500 / MWI
All, I'm using Asterisk 1.6 and using Polycom 500's with SIP firmware 2.1.3. I can not seem to get the Message Waiting Indicator to work reliably (and in my opinion correctly) with voicemail. I've got the following in my phone.cfg: <reginfo> <msg msg.bypassInstantMessage="1"> <mwi msg.mwi.1.callBack="*97"
2012 Nov 27
0
[LLVMdev] strange dbgs() behavior: unable to print floats in machine backend
Can you try making the constructor "explicit" for PrintReg in include/llvm/Target/TargetRegisterInfo.h. I think you were getting an implicit conversion there which should probably be fixed anyway. On Mon, Nov 26, 2012 at 11:47 PM, Bjorn De Sutter < bjorn.desutter at elis.ugent.be> wrote: > Hi, > > that solved my problem on trunk as well, thanks. Strange that you have to
2007 Aug 22
1
rfc3680, reginfo+xml
Hi, RFC3680 defines a SIP event package for registration. This event package which can be used through NOTIFY-SUBSCRIBE methods, seems very useful for free sitting or presence applications. This package is supported in various SIP phones (at least Thomson ST2030) : when turned on, this feature adds a new login/logout menu among other things. It can also be used to send Welcome notices to mobile
2015 Nov 25
2
need help for customized backend LowerFormalArguments
Hi, All, I'm trying to build a customized backend and I need to lower the formal arguments like this: There are several specific registers just for storing formal arguments. And also there are several general purpose registers for computation. If there is an instruction which uses parameters, I should first use a move instruction, which moves the value to general purpose register. For
2012 Nov 27
2
[LLVMdev] strange dbgs() behavior: unable to print floats in machine backend
Hi, that solved my problem on trunk as well, thanks. Strange that you have to include this though. Bjorn On 27 Nov 2012, at 00:00, Daniel Prokesch <daniel.prokesch at gmail.com> wrote: > Hi, > > I accidentally stumbled upon your post. > I observed similar behaviour whenever I did not include > > #include "llvm/Support/Debug.h" > #include
2016 Sep 29
2
[lld][ELF] Addends adjustment for relocatable object
Initial issue is related to R_MIPS_GPREL16/32 relocations. When we calculate such relocations we need to know _gp symbol's value. This value might come from different sources. Usually we setup it using constant offset from the .got section. Also it might be defined by a linker script. And in rare but possible case it comes from .reginfo / .MIPS.options sections. Got example, GNU bfd linker
2004 Jul 01
1
[LLVMdev] Stack alignment problem
Hello, it seems the Prolog/Epilog insertion does not correctly align stack for me. Consider the PEI::calculateFrameObjectOffsets method. It only aligns the stack if FFI->hasCalls() is true. The only place where MachineFrameInfo::setHasCalls is invoked is PEI::saveCallerSavedRegisters and the value 'true' is only passed when there are instructions with opcodes equal
2018 Apr 03
1
Mapping virtual registers to physical registers
Hi Krzysztof, Thanks for your response. I was trying to map function input parameters to machine specific registers. My solution I found is based to the RegInfo.setSimpleHint() API. Here is the body of the parameters loop of TargetLowering::LowerFormalArguments VReg = RegInfo.createVirtualRegister(RC); RegInfo.setSimpleHint(VReg,CLP::FA_ROFF1+i);
2006 Apr 29
2
[LLVMdev] Register allocation in LLVM
Hello, all, I want to implement the register allocation algorithm described in the paper "Register Allocation via Coloring of Chordal Graphs, APLAS'05" in LLVM. This is a graph coloring algorithm that can find an optimal coloring of the interference graph in most of the cases. I've downloaded LLVM last week, and started studying the code. Basically, I have to implement: 1) A
2011 Dec 05
2
[LLVMdev] bug in ARMFrameLowering.cpp:processFunctionBeforeCalleeSavedScan
Hello LLVMDev, I've encountered what looks like a bug in LLVM 2.9, it doesn't appear to be fixed in 3.0 either. The problem occurs in function ARMFrameLowering.cpp:processFunctionBeforeCalleeSavedScan. There's a circular dependency in setting the variable BigStack and AFI->setHashStackFrame(true). The expression which initializes BigStack calls estimateRSSStackSizeLimit which in
2015 Feb 05
5
[LLVMdev] [lld] Representation of lld::Reference with a fake target
Hi, I need an advice on implementation of a very specific kind of relocations used by MIPS N64 ABI. As usual the main problem is how to pass target specific data over Native/YAML conversion barrier. In this ABI relocation record r_info field in fact consists of five subfields: * r_sym - symbol index * r_ssym - special symbol * r_type3 - third relocation type * r_type2 - second relocation type