similar to: [LLVMdev] Optimization passes organization and tradeoffs

On May 20, 2008, at 8:57 AM, David Greene wrote: > On Tuesday 20 May 2008 07:03, Nicolas Capens wrote: > >> 1) Does ScalarReplAggregates totally superscede >> PromoteMemoryToRegister? I > > Nope, they are different. Mem2Reg is really important if you want > register > allocation. Actually SROA does fully subsume Mem2Reg. It iterates between breaking up

On Tuesday 20 May 2008 07:03, Nicolas Capens wrote: > 1) Does ScalarReplAggregates totally superscede PromoteMemoryToRegister? I Nope, they are different. Mem2Reg is really important if you want register allocation. > think I need it to optimize small arrays, but what is the expected added > complexity? I shouldn't think it would be very expensive at all. > 2) Does SCCP also

Hi Chris, Thanks for the detailed explanations. I have a few remaining questions: Am I correct that ScalarReplAggregates is hardly more expensive than Mem2Reg and therefore generally preferable? What would be the code quality implications of using "-dce -simplifycfg" instead of -adce? As far as I understand the algorithms involved, -dce would hardly ever miss a dead instruction if

On Tue, May 20, 2008 at 2:28 PM, Chris Lattner <clattner at apple.com> wrote: > > On May 20, 2008, at 8:57 AM, David Greene wrote: > >> On Tuesday 20 May 2008 07:03, Nicolas Capens wrote: >> >>> 1) Does ScalarReplAggregates totally superscede >>> PromoteMemoryToRegister? I >> >> Nope, they are different. Mem2Reg is really important if you

On Wed, 21 May 2008, Nicolas Capens wrote: > Thanks for the detailed explanations. I have a few remaining questions: > > Am I correct that ScalarReplAggregates is hardly more expensive than Mem2Reg > and therefore generally preferable? Right. > What would be the code quality implications of using "-dce -simplifycfg" > instead of -adce? As far as I understand the

> If you're running opt on the command line directly, then use the > "-p" option. See "-help" for more information on that. > > -bw > I have a couple of more questions. 1. Does -std-compile-opts of opt do the same optimization with llvm-gcc with -O[1-3] options? If I want to debug into passes through llvm-gcc, how do I set a breakpoint right before pass

Hi David, Thanks for the info, but I'm not using any of the command line options. I'm dynamically generating code at run-time. So unless I'm missing some way to set these command line options at run-time I think I need another API for controlling register allocation and scheduling. I was also under the impression that linear scan register allocation is quite cheap, faster than graph

> There should be no difference between using llvm-gcc at some -O > level, and running it at -O0 and using opt to run the passes on > the unoptimized bitcode. However, you wrote earlier: > Finally, llvm-gcc runs the following passes on each function > immediately after it is created: > > CFGSimplification, PromoteMemoryToRegister, > ScalarReplAggregates,

Hi, Today I managed to link ioquake3, but generating a binary does not work yet. 1) On OSX, I get: Error: Code generator does not support intrinsic function 'llvm.ppc.altivec.lvsl'! when I do: llc file.bc -march=c -o file.c 2) On Linux X86, llc does not give any problem, but I get this while compiling the generated .c file: error: unknown register name 'S' in

On Wednesday 21 May 2008 15:48, Chris Lattner wrote: > > What's the difference between GVN and GCSE, if they both perform common > > subexpression elimination? > > GVN does more, and is a better algorithm. GCSE is basically deprecated > and should be removed at some point. Er...waitaminute. Maybe there's something I don't fully grok about GVN, but in general,

Hi Kenneth, On Thursday 17 April 2008 20:50:24 Kenneth Hoste wrote: > On 17 Apr 2008, at 20:39, Chris Lattner wrote: > > On Thu, 17 Apr 2008, HyperQuantum wrote: > >> I have been wondering why llvm-ld generates the same code with or > > without the option "-O5" so I looked at its source (llvm 2.2). And > > apparently, the options "-On" are

Hi Bram, Could you submit bug reports for all of these problems? Thanks! -bw On 5/29/07, Bram Adams <bram.adams at ugent.be> wrote: > Hi, > > Today I managed to link ioquake3, but generating a binary does not > work yet. > > > 1) On OSX, I get: > > Error: Code generator does not support intrinsic function > 'llvm.ppc.altivec.lvsl'! > > when I

On 17 Apr 2008, at 20:39, Chris Lattner wrote: > On Thu, 17 Apr 2008, HyperQuantum wrote: >> I have been wondering why llvm-ld generates the same code with or > without the option "-O5" so I looked at its source (llvm 2.2). And > apparently, the options "-On" are accepted but never used! The program > runs a fixed set of optimization passes, unless

Since introducing the new TargetTransformInfo analysis, there has been some confusion over the role of target heuristics in IR passes. A few patches have led to interesting discussions. To centralize the discussion, until we get some documentation and better APIs in place, let me throw out an oversimplified Straw Man for a new pass pipline. It serves two purposes: (1) an overdue reorganization of

On 7/16/2013 11:38 PM, Andrew Trick wrote: > Since introducing the new TargetTransformInfo analysis, there has been some confusion over the role of target heuristics in IR passes. A few patches have led to interesting discussions. > > To centralize the discussion, until we get some documentation and better APIs in place, let me throw out an oversimplified Straw Man for a new pass pipline.

On Tuesday 07 October 2008 00:32, Nicolas Capens wrote: > Anyway, this can definitely also be done with an analysis pass that > provides information about ordering between loads and stores. It's just Actually, no it can't. See the thread about analysis passes depending on other analysis passes and when things do and don't get updated by PassManager.

Hi Dave, Did that patch of yours ever make it into trunk? I can't seem to find any related checkin for PromoteMemoryToRegister.cpp. I've been doing some extra profiling lately and the RewriteSingleStoreAlloca function alone is taking a whopping 63% of execution time. Thanks! Nicolas -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu]

Hi Dave, As an exercise I tried to fix this myself, and I think I have a working patch (attached). My own tests are all working wonderfully, and at fantastic performance! I'm looking forward to your patch to see whether we used the same approach or whether things could be improved further. Anyway, I've re-profiled the code and found ComputeLiveInBlocks to be the main hotspot now. Again

On Wednesday 24 September 2008 09:35, Nicolas Capens wrote: > Hi Dave, > > Did that patch of yours ever make it into trunk? I can't seem to find any > related checkin for PromoteMemoryToRegister.cpp. I've been doing some extra > profiling lately and the RewriteSingleStoreAlloca function alone is taking > a whopping 63% of execution time. I will commit it today along with

On Tuesday 07 October 2008 12:37, Dan Gohman wrote: > On Tue, October 7, 2008 9:02 am, David Greene wrote: > > On Tuesday 07 October 2008 00:32, Nicolas Capens wrote: > >> Anyway, this can definitely also be done with an analysis pass that > >> provides information about ordering between loads and stores. It's just > > > > Actually, no it can't. See