similar to: [LLVMdev] docs old version

Hi Florian, we though about using UIUC, like in LLVM. Do you guys know if that could be a problem, given that we are mining the functions from github? > Have you thought about integrating the benchmarks as external tests into LLVM’s test-suite? That would make it very easy to play around with. We did not think about it actually. But we would be happy to do it, if the community accepts

Fernando, The code there should be more or less functional, though it's not currently used by anything. Eventually it should probably be moved to a method on MachineBasicBlock. The API breakage you're seeing is because some methods moved around. Feel free to fix it. :-) --Owen On Jan 26, 2008, at 6:31 PM, Fernando Magno Quintao Pereira wrote: > > Hi LLVMers, > >

Dear LLVMers, I need help with one error in my register allocator. I am getting errors when folding instructions for the x86 (it does not happen when I use the PowerPC as target). The problem is that, when I execute something like: mi = mbb->insert(mbb->erase(mi), fmi), where mbb is a MachineBasicBlock, valgrind gives this error message: Address 0x42C62B0 is 24 bytes inside a block

Hi, > On Dec 31, 2016, at 8:33 AM, Fernando Magno Quintao Pereira via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Dear LLVMers, > > we have released a tool that uses LLVM to insert OpenACC or OpenMP > 4.0 directives in programs. You can use the tool online here: > http://cuda.dcc.ufmg.br/dawn/. Our tool, dawn-cc, analyzes the LLVM IR > to infer the sizes of

Dear Mehdi, I've changed your example a little bit: float saxpy(float a, float *x, float *y, int n) { int j = 0; for (int i = 0; i < n; ++i) { y[j] = a*x[i] + y[I]; // Change 'I' into 'j'? ++j; } } I get this code below, once I replace 'I' with 'j'. We are copying n positions of both arrays, 'x' and 'y': float saxpy(float a,

Dear llvmers, I am trying to insert a move instruction where both source and destination registers are physical registers. How is the code for this? I tried this one here: void PhiDeconstruction_Fer::add_move ( MachineFunction & mf, MachineBasicBlock & mbb, unsigned

Hi LLVMers, what is the status of breaking critical edges in machine functions? I just compiled the top of the LLVM tree, and I found llvm/CodeGen/BreakCriticalMachineEdge.h. But this file seems not to be up-to-date with the other classes in the top of the tree. For instance, it calls isTerminatorInstr on llvm::TargetInstrInfo, but this method is no longer there. If I want to break

Dear LLVMers, I wish someone could help me to clarify a register allocation question. I will use X86 in this example, but it really does not matter too much. Imagine that I have a virtual v stored in register AL, and I am about to cross a function call, that effectively overwrites AL. Well, I have, say, register ESI free, but as it happens, ESI is bigger than AL. It should be

Dear LLVMers, we have released a tool that uses LLVM to insert OpenACC or OpenMP 4.0 directives in programs. You can use the tool online here: http://cuda.dcc.ufmg.br/dawn/. Our tool, dawn-cc, analyzes the LLVM IR to infer the sizes of memory chunks, and to find dependences within loops. After that, we use debug information to translate the low-level information back into annotations that we

Hi, LLVMers, has someone implemented bitwidth analysis for LLVM? I was looking for something similar to the bitwise compiler described in "Bidwidth analysis with application to silicon compilation, by Mark Stephenson, Jonathan Babb and Saman Amarasinghe" e.g.: http://portal.acm.org/citation.cfm?id=349299.349317 all the best, Fernando

On Mon, 1 May 2006, Fernando Magno Quintao Pereira wrote: > Hello, llvmers. Could someone explain me a little about the opt tool? I am > having problems to load a MachineFunctionPass using opt. I have this pass: MachineFunctionPass's cannot be used as part of opt, they can only be used as part of LLC. Further, you have to explicitly modify the target you are interested in to add it

Dear LLVM guys, I am coding a liveness analysis algorithm, and I found this comment on LiveVariables.cpp: Line 00195 - http://llvm.org/doxygen/LiveVariables_8cpp-source.html : // PhysRegInfo - Keep track of which instruction was the last use of a // physical register. This is a purely local property, because all physical // register references as presumed dead across basic blocks.

Dear LLVMers, we, at UFMG, have been building a large collection of compilable benchmarks. Today, we have one million C files, mined from open-source repositories, that compile into LLVM bytecodes (and from there to object files). To ensure compilation, we perform type inference on the C programs. Type inference lets us replace missing dependencies. The benchmarks are available at:

Thanks again. One more question here: Since the regalloc works once per function, do I stil have access to the Call graph? Just saving information between regalloc passes for different functions may not be enough for my case. I will need to maintain the regalloc info of various passes in the call graph order. Anyways thanks for your inputs. I will get back if I need to learn more. Sanjiv On Nov

On 11/23/07, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: > > > Hi, Sanjiv, > > those passes operate on the whole machine function. Each machine > function contains many basic blocks. If a program has many functions, the > register allocator will be called as many times, i.e it does not do > interprocedural allocation. > > best, > >

Hi Fernando, On Jul 18, 2007, at 10:57 AM, Fernando Magno Quintao Pereira wrote: > > Dear LLVMers, > > we here in the UCLA compiler's lab have an implementation of a > very > cool register allocator in LLVM. It finds an optimal register > assignment > for the x86 machine, via live range splitting, that is, if it is > possible > to have a register

Hello, llvmers. Could someone explain me a little about the opt tool? I am having problems to load a MachineFunctionPass using opt. I have this pass: #include "llvm/Pass.h" #include "llvm/Function.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include <iostream> using namespace llvm; namespace { struct MacFoo : public MachineFunctionPass { virtual

Hi, again, I think you can do it in the same way that the other allocators have been coded, i.e extend RA, register the pass and so forth. I am not sure about the best way to pass information among a run of RegAlloc to the other, maybe the other guys in the list could suggest something. Yet, you can always dump it into a file, and read it again, everytime it is necessary. Remember that

>> And I have a quite fast algo that I believe is simpler than [Budimlic02] >> and I can share it with you :) > > Do you have a paper on this? I'd be interested in seeing it. > Yes, I have a tech report on this page: http://compilers/fernando/projects/soc/ and I have submitted a paper to SAS, and now I am waiting for the review. The coalescing algorithm is described in

> > Hello, llvmers. Could someone explain me a little about the opt tool? I am > > having problems to load a MachineFunctionPass using opt. I have this pass: > > MachineFunctionPass's cannot be used as part of opt, they can only be used > as part of LLC. Further, you have to explicitly modify the target you are > interested in to add it to the pass manager for that