Displaying 20 results from an estimated 10000 matches similar to: "[LLVMdev] Write permissions for a new target."
2009 Aug 13
2
[LLVMdev] XCore & PIC16 AsmPrinters
On Aug 12, 2009, at 9:48 PM, Sanjiv.Gupta at microchip.com wrote:
> Chris,
> I will try to get it done before 2.6. (8/21).
>
Thanks Sanjiv! One other nice cleanup (but which is not time critical
at all) would be to merge the contents of "PIC16Section" into the new
"MCSectionPIC16" class. Unlike the previous design, you're now
allowed to store arbitrary
2009 Jul 01
2
[LLVMdev] llvmc for PIC16
The driver behaves differently when I run it by specifying absolute path
than when I run it with relative path.
See example
Relative:
i00202 at ubuntu:/tmp$ mcc16 --save-temps -dry-run hello.c./clang-cc -I
./include -triple=pic16- -emit-llvm-bc hello.c -o hello.bc-pqDR1Y
llvm-ld -link-as-library hello.bc-pqDR1Y -o tmp.bc-M1Rwip
llc -march=pic16 -f tmp.bc-M1Rwip -o tmp.s-DcVczP
gpasm -I ./inc
2008 Oct 13
2
[LLVMdev] INSERT_SUBREG node.
On Thu, 2008-10-02 at 11:19 -0700, Evan Cheng wrote:
>
> On Oct 2, 2008, at 11:02 AM, Sanjiv.Gupta at microchip.com wrote:
>
> > What’s the value produced by an INSERT_SUBREG node? Is it a chain?
>
>
> No, insert_subreg returns a value:
>
>
> v1 = insert_subreg v2, v3, idx
>
>
> v1 and v2 will have the same type, e.g. i16, and v3 must have a
>
2008 Oct 15
3
[LLVMdev] INSERT_SUBREG node.
On Wed, 2008-10-15 at 10:08 -0700, Evan Cheng wrote:
> On Oct 15, 2008, at 5:29 AM, sanjiv gupta wrote:
>
> > On Tue, 2008-10-14 at 10:19 -0700, Evan Cheng wrote:
> >> You need to specify sub-register == super-register, idx relationship.
> >> See X86RegisterInfo.td:
> >>
> >> def x86_subreg_8bit : PatLeaf<(i32 1)>;
> >> def
2009 Jun 28
1
[LLVMdev] llvmc for PIC16
Mikhail Glushenkov wrote:
> Hi Sanjiv,
>
> 2009/6/23 <Sanjiv.Gupta at microchip.com>
>
>>> BTW, Chris's Makefile changes broke llvmc yesterday (r75379). I'm
>>> working on a fix.
>>>
>> Hi Mikhail,
>> Did you get a chance to fix this. I still get errors while building examples.
>>
>>
>
> This issue
2009 Sep 22
2
[LLVMdev] ld with gold-plugin can do this?
Nick Lewycky wrote:
> Sanjiv.Gupta at microchip.com wrote:
>>
>>
>> A common followup question is "but how do I link native libraries into
>> my .bc file". You don't. A .bc file is llvm ir, you can't put a native
>> binary library into a .bc (barring sticking it in as a string, etc).
>>
>> The build then looks like:
>>
>>
2009 Sep 21
2
[LLVMdev] ld with gold-plugin can do this?
A common followup question is "but how do I link native libraries into
my .bc file". You don't. A .bc file is llvm ir, you can't put a native
binary library into a .bc (barring sticking it in as a string, etc).
The build then looks like:
a) 'llvm-gcc -c -flo -O2' to generate the .bc files.
b) 'llvm-ld' to combine them into a single .bc. No, not a .so nor a .a.
2008 Oct 15
2
[LLVMdev] INSERT_SUBREG node.
On Tue, 2008-10-14 at 10:19 -0700, Evan Cheng wrote:
> You need to specify sub-register == super-register, idx relationship.
> See X86RegisterInfo.td:
>
> def x86_subreg_8bit : PatLeaf<(i32 1)>;
> def x86_subreg_16bit : PatLeaf<(i32 2)>;
> def x86_subreg_32bit : PatLeaf<(i32 3)>;
>
> def : SubRegSet<1, [AX, CX, DX, BX, SP, BP, SI, DI,
>
2009 Jun 30
2
[LLVMdev] llvmc for PIC16
Mikhail Glushenkov wrote:
> Hi Sanjiv,
>
> 2009/6/29 Sanjiv Gupta <sanjiv.gupta at microchip.com>:
>
>> I want to retrieve the value of argv[0] (which was passed to main function
>> of the driver) in PrependCustomizedPath.
>>
>
> I've added a way to access argv[0] in hooks:
> http://thread.gmane.org/gmane.comp.compilers.llvm.cvs/50789
>
2009 Jul 20
0
[LLVMdev] PIC16TargetAsmInfo::getBSSSectionForGlobal
Substituting the uses of a global with an absolute address would make
all accesses to that global through pointer, which is very inefficient
on PIC16. So we don't change the code generation for that global;
instead we only pass the address information to the linker (home made
linker) through some assembly directives.
What are you trying to do? Are you trying to change the logic of this
part or
2008 Oct 15
0
[LLVMdev] INSERT_SUBREG node.
On Oct 15, 2008, at 5:29 AM, sanjiv gupta wrote:
> On Tue, 2008-10-14 at 10:19 -0700, Evan Cheng wrote:
>> You need to specify sub-register == super-register, idx relationship.
>> See X86RegisterInfo.td:
>>
>> def x86_subreg_8bit : PatLeaf<(i32 1)>;
>> def x86_subreg_16bit : PatLeaf<(i32 2)>;
>> def x86_subreg_32bit : PatLeaf<(i32
2009 Jun 15
3
[LLVMdev] llvmc for PIC16
Mikhail Glushenkov wrote:
>
> Hi Sanjiv,
>
> Sanjiv Gupta <sanjiv.gupta <at> microchip.com> writes:
>
> > The salient features that we want to have in the driver are:
> > [...]
>
> As promised, I've implemented a basic compiler driver for the
> PIC16 toolchain. It's under tools/llvmc/examples/mcc16.
>
Hi Mikhail,
How do you build mcc16
2009 Aug 13
0
[LLVMdev] XCore & PIC16 AsmPrinters
Chris,
I will try to get it done before 2.6. (8/21).
- Sanjiv
-----Original Message-----
From: llvmdev-bounces at cs.uiuc.edu on behalf of Chris Lattner
Sent: Wed 8/12/2009 10:08 PM
To: LLVM Developers Mailing List
Subject: [LLVMdev] XCore & PIC16 AsmPrinters
Hi XCore and PIC16 maintainers,
I'd appreciate it if you guys could move your AsmPrinter
implementation to be in a
2008 Oct 14
0
[LLVMdev] INSERT_SUBREG node.
You need to specify sub-register == super-register, idx relationship.
See X86RegisterInfo.td:
def x86_subreg_8bit : PatLeaf<(i32 1)>;
def x86_subreg_16bit : PatLeaf<(i32 2)>;
def x86_subreg_32bit : PatLeaf<(i32 3)>;
def : SubRegSet<1, [AX, CX, DX, BX, SP, BP, SI, DI,
R8W, R9W, R10W, R11W, R12W, R13W, R14W, R15W],
[AL, CL,
2009 Aug 03
2
[LLVMdev] disabling combining load/stores in optimizer.
Consider writes to a struct {i32 a; i32 b};
The optimizer can currently combine stores (i32, i32) to a single i64
store operation. Is there a way to disable that?
I feel that such optimizations may not result in any gain for PIC16 as
PIC16 does everything on i8.
- Sanjiv
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2009 Jun 07
0
[LLVMdev] llvmc for PIC16
Hi Sanjiv,
Sanjiv Gupta <sanjiv.gupta <at> microchip.com> writes:
> The salient features that we want to have in the driver are:
> [...]
As promised, I've implemented a basic compiler driver for the
PIC16 toolchain. It's under tools/llvmc/examples/mcc16.
Some examples illustrating the features you requested:
> 2. If the user has specified to generate the final
2009 Jul 20
2
[LLVMdev] PIC16TargetAsmInfo::getBSSSectionForGlobal
Hi Sanjiv,
The PIC16TargetAsmInfo::getBSSSectionForGlobal apparently does magic
that reinterprets the "section" field of a global in a strange way:
// If GV has a sectin name or section address create that section
now.
if (GV->hasSection()) {
std::string SectName = GV->getSection();
// If address for a variable is specified, get the address and
create
2009 Jun 03
2
[LLVMdev] llvmc for PIC16
PIC16 now has clang and llc based system to generate native assembly. We
then use our native assembler (gpasm) and the native linker (mplink) to
generate the final executable. How can I integrate these things with
the driver llvmc to have gcc like user experience? Note that we also
want to run llvm-ld in order to perform the LTOs in case of multiple files.
- Sanjiv
2009 Sep 21
0
[LLVMdev] ld with gold-plugin can do this?
Sanjiv.Gupta at microchip.com wrote:
>
>
> A common followup question is "but how do I link native libraries into
> my .bc file". You don't. A .bc file is llvm ir, you can't put a native
> binary library into a .bc (barring sticking it in as a string, etc).
>
> The build then looks like:
>
> a) 'llvm-gcc -c -flo -O2' to generate the .bc
2009 Jul 01
0
[LLVMdev] llvmc for PIC16
I found out the problem. Looks like I can not rely on argv[0] to contain
the full path of the executable always.
Can I rely on:
static Path GetMainExecutable(const char *argv0, void *MainAddr);
is it Cross-platform?
What to pass for second parameter here. C++ forbids taking address of
"main", and the "Main" of CompilerDriver is in a shared object here.
- Sanjiv
Sanjiv