similar to: [LLVMdev] Compatible Return Type for Intrinsics

<table cellspacing='0' cellpadding='0' border='0' ><tr><td style='font: inherit;'>Hi,<br>I tried creating intrinsics which are to be<br>placeholders for a set of instructions (actually a section of a basic block) to be executed elsewhere(for e.g. in HW).<br>These intrinsics are to take care of the data dependencies of the set of

Hello, LLVM's intrinsic overloading mechanism does not currently support overloading on pointer types. Patches to implement this would be welcome. Dan On May 7, 2008, at 9:25 AM, aditya vishnubhotla wrote: > Hi, > I tried creating intrinsics which are to be > placeholders for a set of instructions (actually a section of a > basic block) to be executed elsewhere(for e.g. in

Hi! I want to know How to count the number of predecessors for each basic block? Thank You ____________________________________________________________________________________ Never miss a thing. Make Yahoo your home page. http://www.yahoo.com/r/hs

Hi aditya, There are two ways to cound the number of predecessors for each basic block. You can generate the control flow graph using the CallGraphScc pass with the granularity of basic block and can simply traverse the graph bottom up till the root. The number of nodes encountered would be the number of predecessors. The second way would be to use the special ;preds marker in the llvm IR. Each

Hi, I tried creating variable argument intrinsics which are to be placeholders for some instructions which should not be executed by the backend. Kindly help me with the errors in my "migrate_begin" intrinsic creation //Additions made to Intrinsics.td file: def llvm_migrate_begin : LLVMType<iAny>; def int_migrate_begin :

> The harm comes if the intrinsic ends up with the wrong value, or attached to the wrong loop. The intrinsic is marked as IntrNoDuplicate, so I wasn't worried about it ending up somewhere else. Also, it is a property of a specific loop, a tail-folded vector loop, that holds even after it is transformed I think. I.e. unrolling a vector loop is probably not what you want, but even if you do

Hi, I am writing a pass which identifies the parts(basic blocks/functions) of the input algorithm with more of data flow or control flow. These parts are to be separated executed by different backends. My idea is to insert replacement basic blocks with intrinsic instructions within the basic block. These instructions should satisfy the data dependencies within the LLVM data structure and should

hi I want to use two intrinsic functions which should be placeholders for some instructions which should not be executed by the backend. So these two intrinsics should just keep the data dependencies while i try to separate set of instructions(with more of data flow) to be executed on hardware. One intrinsic which takes care of the data dependencies required for proper execution of the

Hi Roger, That's a good example, that shows most of the moving parts involved here. In a nutshell, the difference is, and what we would like to make explicit, is the vector trip versus the scalar loop trip count. In your IR example, the loads/stores are predicated on a mask that is calculated from a splat induction variable, which is compared with the vector trip count. Illustrated with your

Hi, Thank You for the advice and we were able to solve that problem by the following modifications to the Instrinsics.td file. But I now have an "Invalid Intrinsic name" error This error occurs presumably because the created intrinsic is named: llvm.migrate_begin.i32 Intrinsics.gen checks for a string length of 18 (i.e. the length without the .i32). Kindly help me through it.

On Feb 19, 2008, at 1:11 AM, aditya vishnubhotla wrote: > Hi, > I tried creating variable argument intrinsics which > are to be placeholders for some instructions which > should not be executed by the backend. > > Kindly help me with the errors in my "migrate_begin" > intrinsic creation > > //Additions made to Intrinsics.td file: > > def

hi, how to get the number of immediate predecessors for each basic block (arguements of remarks statement at the beginning of the basic block) thank you aditya ____________________________________________________________________________________ Never miss a thing. Make Yahoo your home page. http://www.yahoo.com/r/hs

Hi, I have implemented intrinsics which are placeholders for instructions executed elsewhere (e.g. in HW). So i have two types of intrinsics migrate_begin and migrate_end. Now i would like to make these intrinsics known to the PowerPC backend. Since the hardware initialization can not be implemented by one instruction it has to be expanded to a library call or lowered to something the ppc

> Please start a thread on llvmdev about this functionality, and outline what other intrinsics will have to change to add non-8-bit byte support. Well, memset is the only we have seen so far (our back-end is ~50% finished for an initial release). We have our own front-end as well (we are currently not using the clang front-end), and currently don't use many llvm intrinsics (only

Hi, I tried creating intrinsics which are to be placeholders for a set of instructions which should not be executed by the backend. I want to retain only intrinsic,phi and terminator instructions in a basic block. I have taken care of the external dependencies of basic block. How do I delete the rest of the instructions? Thank You Aditya P.S:

Hi Eli, > The problem with your proposal, as written, is that the vectorizer is producing the intrinsic. Because we don’t impose any ordering on optimizations before codegen, every optimization pass in LLVM would have to be taught to preserve any @llvm.set.loop.elements.i32 whenever it makes any change. This is completely impractical because the intrinsic isn’t related to anything

Hi Vishal, Ruijie, Thanks for your interest in the project. To get started, the first task would be to merge the 5 patches on top of trunk llvm. The list of patches are listed in the project description: http://llvm.org/OpenProjects.html#llvm_mergesim Please create an account in llvm phabricator (reviews.llvm.org) if you haven't already, and put your patches there. Let me know if you have

FYI, The LLVM Performance Workshop will be held at CGO 2017. The workshop is co-located with CC, HPCA, and PPoPP. If you are interested in attending the workshop, please register at the CGO website: http://cgo.org/cgo2017/workshops.html When: Saturday February 4th, 2017 Where: Austin, Texas, USA ---- Hi, CGO workshop and tutorial organizers, This is a friendly reminder that early

Hi Stefanos, Thanks for your comments. I added both as reviewer. > One question though. Are you sure that this: > This helps with LICM when instructions inside a conditional is loop invariant  > is not achieved with the current LoopRotate pass? Because AFAIK, it does. Basically it inserts > a guard (that branches to the preheader) and then passes like LICM hoist invariant

while # sudo nautilus i get this : root at static-16 aditya]# sudo nautilus No protocol specified Could not parse arguments: Cannot open display: [root at static-16 aditya]# please resolve. Also what does the "static-16" denote? -- -Aditya Mamidwar