Displaying 20 results from an estimated 500 matches similar to: "[LLVMdev] RFC: Tailcall Improvement"
2012 Oct 26
1
[LLVMdev] Properly handling mem-loc arguments when prologue adjusts FP.
For my target, I handle incoming memory arguments by creating a store to
memory (in LowerCall, [1]), then creating a fixed object on the stack and
loading from it (in LowerFormalArguments[2]). This approach was based on
MSP430.
I now have the problem that the resulting loads in my output assembly are
done assuming that the call stack looks something like:
------
MemArg
------
MemArg
------
2008 Apr 16
2
[LLVMdev] RFC: PowerPC tail call optimization patch
Hello Dale,
this is an updated version of the tail call optimization patch for
powerpc. could you have a look at it?
i added code to support ppc64 (untested, will try to get access to
ppc64 on a friend's machine).
incorporated evan's formatting suggestions. ;)
will run another round of testing (llvm-test) on my powerpc g4/800
when i get the okay to commit. testing on this machine takes
2008 Apr 21
0
[LLVMdev] RFC: PowerPC tail call optimization patch
On Apr 16, 2008, at 10:07 AM, Arnold Schwaighofer wrote:
> Hello Dale,
>
> this is an updated version of the tail call optimization patch for
> powerpc. could you have a look at it?
>
> i added code to support ppc64 (untested, will try to get access to
> ppc64 on a friend's machine).
> incorporated evan's formatting suggestions. ;)
>
> will run another round
2008 Apr 22
2
[LLVMdev] RFC: PowerPC tail call optimization patch
On Tue, Apr 22, 2008 at 12:30 AM, Evan Cheng <evan.cheng at apple.com> wrote:
> More nitpicks:
> ...
> No need for else here. :-)
Done
> SPDiff = (int)CallerMinReservedArea - (int)ParamSize;
>
> Just change last statement to
> int SPDiff = (int)...
Done
>
> +bool
> +PPCTargetLowering::IsEligibleForTailCallOptimization(SDOperand Call,
> +
2007 Oct 04
3
[LLVMdev] RFC: Tail call optimization X86
Comments:
CheckDAGForTailCallsAndFixThem -
1.
for (SelectionDAG::allnodes_iterator BE = DAG.allnodes_begin(),
+ BI = prior(DAG.allnodes_end()); BI != BE; BI--) {
Please use pre-decrement instead of post-decrement.
2. The function is slower than it should be. You are scanning all the
nodes in the DAG twice. You should just examine DAG.getRoot() to make
determine whether it's a
2007 Oct 02
0
[LLVMdev] RFC: Tail call optimization X86
Hi all,
I changed the code that checks whether a tail call is really eligible
for optimization so that it performs the check/fix in
SelectionDAGISel.cpp:BuildSelectionDAG() as suggest by Evan. Also
eliminated an error that caused the remaining failing test cases in
the test-suite.
The results look very nice (on darwin x86, r42486).
The same number (46) of failing test cases on patched
2018 Mar 28
0
arm tailcall with many parameters?
Sorry that also suffered from signature mismatch.
So how about more like:
typedef struct vtable_t {
int (*pf4)(int a, int b, int c, int d);
int (*pf5)(int a, int b, int c, int d, int e);
} vtable_t;
int f3(int (*pf5)(int a, int b, int c, int d, int e), int a, int b, int c, int d)
{
return pf5(a, b, c, d, d + d);
}
int f4(vtable_t *vt, int a, int b, int c, int d)
{
return vt->pf5(a, b,
2008 Jan 03
2
[LLVMdev] Tailcall optimization in jit stopped working
tailcall optimization stop working in jit (lli) in revision 45527. i
guess this is because the jit is tailjmping to the wrong function
address. the following change would reenable tailcallopt in jit. But
i am pretty sure that this is not the correct fix (since i don't
really understand what is going on :). maybe evan can comment on this?
regards arnold
Index:
2007 Sep 26
3
[LLVMdev] RFC: Tail call optimization X86
On Tue, 25 Sep 2007, Evan Cheng wrote:
>> the stack adjustment only fastcc was not one of them. Now that fastcc
>> can cause tail call optimization i had to change the convention from
>> caller pops arguments to callee pops arguments in order to allow tail
>> call optimization in a general way.
>
> Hmmm. Ok. So this is due to X86CallingConv.td changes? Unfortunately
2018 Mar 28
2
arm tailcall with many parameters?
typedef struct vtable_t {
int (*pf4)(int a, int b, int c, int d);
int (*pf5)(int a, int b, int c, int d, int e);
} vtable_t;
int f1(int (*pf4)(int a, int b, int c, int d))
{
return pf4(1, 2, 3, 4);
}
int f2(vtable_t *vt)
{
return vt->pf4(1, 2, 3, 4);
}
gcc and clang will not tailcall these on arm with -O3.
int f3(int (*pf5)(int a, int b, int c, int d, int e))
{
return pf5(1, 2, 3,
2008 Mar 27
1
[LLVMdev] RFC: tailcall ppc32 patch
Hi there,
it's me again. attached is preliminary support for tail calls on ppc
32. (once i get access to a 64bit machine that part will follow). It
has passed the llvm-test with the -tailcallopt flag enabled. (after
half a day on an old g4/800 :)
okay to submit? probably not. :) suggestions.
regards
arnold
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2009 Mar 11
4
[LLVMdev] Bug in X86CompilationCallback_SSE
I don't know how to file a PR, but I have a patch (see below), that
should work regardless of abi differences, since it relies on the
compiler to do the though job.
void X86CompilationCallback_SSE(void) {
char * SAVEBUF= (char*) alloca(64+12); // alloca is 16byte aligned
asm volatile (
"movl %%eax,(%0)\n"
"movl %%edx,4(%0)\n" // Save EAX/EDX/ECX
2004 Oct 18
3
[LLVMdev] Fix for non-standard variable length array + Visual C X86 specific code
Paolo Invernizzi wrote:
> There was a similar problem some time ago, and was resolved with alloca.
> I think it's a better solution to use the stack instead of the heap...
I tend to agree, but the constructors won't get called if it's an object
array -- anyway, this particular case there was no objects, just
pointers and bools so alloca should be fine. I'll leave it to
2009 Mar 11
0
[LLVMdev] Bug in X86CompilationCallback_SSE
Hello, Corrado
> Before you can correctly invoke a function via the Procedure Linkage
> Table (plt), the ABI mandates that ebx is pointing to the GOT (Global
> Offset Table) (see http://www.greyhat.ch/lab/downloads/pic.html)
This is known issue, just nobody realized, that we have bunch of non-
PIC-aware assembler code. :) Fixing would be not so trivial though,
mostly due to ABI
2008 Apr 22
0
[LLVMdev] RFC: PowerPC tail call optimization patch
On Apr 22, 2008, at 4:58 AM, Arnold Schwaighofer wrote:
> On Tue, Apr 22, 2008 at 12:30 AM, Evan Cheng <evan.cheng at apple.com>
> wrote:
>> More nitpicks:
>> ...
>> No need for else here. :-)
> Done
>> SPDiff = (int)CallerMinReservedArea - (int)ParamSize;
>>
>> Just change last statement to
>> int SPDiff = (int)...
> Done
>>
2017 Sep 17
2
Question about 'DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT'
Please open a bugzilla ticket and attach your testcase. It will allow us to debug and fix the problem.
Thanks
- Elena
From: JinGu [mailto:jingu at codeplay.com]
Sent: Saturday, September 16, 2017 00:38
To: Demikhovsky, Elena <elena.demikhovsky at intel.com>; daniel_l_sanders at apple.com <daniel_l_sanders at apple.com>; Jon Chesterfield <jonathanchesterfield at
2017 Sep 18
1
Question about 'DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT'
> so I think we need to use non-extending load for element size less than 8bit on "DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT" like this roughly.
> if (N->getOperand(0).getValueType().getVectorElementType().getSizeInBits() < 8) {
> return DAG.getLoad(N->getValueType(0), dl, Store, StackPtr, MachinePointerInfo());
> } else {
> return
2009 Mar 10
2
[LLVMdev] Bug in X86CompilationCallback_SSE
Hello.
I found that the X86CompilationCallback_SSE wrapper for
X86CompilationCallback2 is not setting up properly for the PIC
invocation.
Before you can correctly invoke a function via the Procedure Linkage
Table (plt), the ABI mandates that ebx is pointing to the GOT (Global
Offset Table) (see http://www.greyhat.ch/lab/downloads/pic.html)
Dump of assembler code for function
2017 Sep 15
2
Question about 'DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT'
> extends the elements to 8bit and stores them on stack.
Store is responsible for zero-extend. This is the policy...
- Elena
-----Original Message-----
From: jingu at codeplay.com [mailto:jingu at codeplay.com]
Sent: Friday, September 15, 2017 17:45
To: llvm-dev at lists.llvm.org; Demikhovsky, Elena <elena.demikhovsky at intel.com>; daniel_l_sanders at apple.com
Subject: Re: Question
2007 Oct 05
0
[LLVMdev] RFC: Tail call optimization X86
Hi Evan,
I incoporated the changes you request but to the following i have got
a question:
> Also, moving the option
> there will allow us to change fastcc ABI (callee popping arguments)
> only when this option is on. See Chris' email:
I am not to sure on that. because that would make modules compiled
with the flag on incompatible with ones compiled without the flag off
as