similar to: [LLVMdev] Advice updating version

On 11/23/07, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: > > > Hi, Sanjiv, > > those passes operate on the whole machine function. Each machine > function contains many basic blocks. If a program has many functions, the > register allocator will be called as many times, i.e it does not do > interprocedural allocation. > > best, > >

>> And I have a quite fast algo that I believe is simpler than [Budimlic02] >> and I can share it with you :) > > Do you have a paper on this? I'd be interested in seeing it. > Yes, I have a tech report on this page: http://compilers/fernando/projects/soc/ and I have submitted a paper to SAS, and now I am waiting for the review. The coalescing algorithm is described in

Thanks again. One more question here: Since the regalloc works once per function, do I stil have access to the Call graph? Just saving information between regalloc passes for different functions may not be enough for my case. I will need to maintain the regalloc info of various passes in the call graph order. Anyways thanks for your inputs. I will get back if I need to learn more. Sanjiv On Nov

Hi, again, I think you can do it in the same way that the other allocators have been coded, i.e extend RA, register the pass and so forth. I am not sure about the best way to pass information among a run of RegAlloc to the other, maybe the other guys in the list could suggest something. Yet, you can always dump it into a file, and read it again, everytime it is necessary. Remember that

Hi guys, I have been using a debugger for my register allocator. The debugger happened to be very useful at catching register assignment errors. I've put the debugger on-line, if anyone who is working with register allocation wants to use. The debugger itself has nothing to do with LLVM, but I've coded a spiller that prints the code in a format that the debugger can read. The

> And I have a quite fast algo that I believe is simpler than [Budimlic02] > and I can share it with you :) Do you have a paper on this? I'd be interested in seeing it. -Tanya > > Fernando > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu >

Dear guys, what is the best way to implement a swap of floating point registers in X86? For the integer registers, I am using xchg. Is there a similar instruction for floating point? My function to insert swaps is like: void X86RegisterInfo::swapRegs( MachineBasicBlock & mbb, MachineBasicBlock::iterator mi, unsigned r1, unsigned r2, const TargetRegisterClass

Guys, I need advice in how to handle a problem. The problem: In X86_64, pointers are 64-bit variables, and are stored into 64-bit registers. However, some pointers are small enough that they can be represented as 32-bit values. Is there some way, in LLVM, to recognize which pointers can be stored into 32-bit registers, and so modify their class accordingly? Any ideas or hints would

Who's your advisor? -scooter (aka "Dr. B. Scott Michel, UCLA CS 2004" :-) On Apr 12, 2007, at 4:39 PM, Fernando Magno Quintao Pereira wrote: > >>> And I have a quite fast algo that I believe is simpler than >>> [Budimlic02] >>> and I can share it with you :) >> >> Do you have a paper on this? I'd be interested in seeing it.

On Aug 17, 2007, at 4:17 PM, Fernando Magno Quintao Pereira wrote: > > Hi guys, > > I have been using a debugger for my register allocator. The > debugger > happened to be very useful at catching register assignment errors. > I've > put the debugger on-line, if anyone who is working with register > allocation wants to use. The debugger itself has nothing to

On 7/3/07, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: > > what is the best way to implement a swap of floating point registers > in X86? For the integer registers, I am using xchg. Is there a similar > instruction for floating point? FXCH swaps stN with st0, but you'd have to use memory for arbitrary swaps I believe. I have no idea if it's the

On Thu, May 15, 2008 at 5:45 PM, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: > > Guys, I need advice in how to handle a problem. > > The problem: > In X86_64, pointers are 64-bit variables, and are stored into 64-bit > registers. However, some pointers are small enough that they can be > represented as 32-bit values. > Is there some way, in

Hi Florian, we though about using UIUC, like in LLVM. Do you guys know if that could be a problem, given that we are mining the functions from github? > Have you thought about integrating the benchmarks as external tests into LLVM’s test-suite? That would make it very easy to play around with. We did not think about it actually. But we would be happy to do it, if the community accepts

Dear guys, I want to coalesce some copies, and I would like to know if there is any method that I can call, like JoinCopy from the old (LLVM 1.9) LiveIntervals class. I found it in SimpleRegisterCoalescing (LLVM 2.1), but I do not want to call this analysis, as I have my own. basically, I can determine that two virtuals do not overlap, and I know that it is safe to join them. In

Hi, I am able to remove the critical edges now. I only had to insert the line below in PPCTargetmachine.cpp. PM.add(createBreakCriticalEdgesPass()); However, it does not remove all the critical edges. I am getting a very weird dataflow graph (even without the Break Critical edges pass). The dataflow generated by MachineFunction::dump() for the program below is given here:

Hey, guys, I am creating some move instructions with MRegisterInfo::copyRegToReg. How do I get a pointer to the instruction that I just created? Is there a way to do something like: // mbb is MachineBasicBlock, reg_info is MRegisterInfo MachineBasicBlock::iterator iter = mbb.getFirstTerminator(); reg_info->copyRegToReg(mbb, iter, dst, src, rc); iter--; (???) MachineInstr *

Guys, I am in need of a no-op instruction: an instruction that does not do anything, and has no operands. Does LLVM predefine such an instruction? I want to transform the program so that there is no empty basic block. Fernando

Dear guys, I've adapted the pass in BreakCriticalEdges.cpp so I can use it before register allocation. But the pass is not changing the control flow graph of the machine function. I think it is because I am inserting the pass after the control flow graph of the machine function is built. I am inserting the pass as required by the register allocator, and I can see that the pass is

Well, someone correct me if am wrong, but, you still have to allocate physical registers to them, because their values must be reloaded before been used. But after you spill a register, you break its live ranges, so, each use of that register can be loaded into a different physical. In my register allocator, after I spill reg_v: For each use of reg_v: create a new reg_v' replace reg_v

Hi, Sanjiv, those passes operate on the whole machine function. Each machine function contains many basic blocks. If a program has many functions, the register allocator will be called as many times, i.e it does not do interprocedural allocation. best, Fernando > As far as I understand , the regalloc passes provided operate on basic block > level? > Is there anything that