Displaying 20 results from an estimated 10000 matches similar to: "[LLVMdev] how to compile several files at ipa level using LLVM?"
2008 Apr 23
0
[LLVMdev] how to dump DSA graph in gdb?
Tianwei wrote:
> On Wed, Apr 23, 2008 at 11:59 PM, John Criswell <criswell at cs.uiuc.edu<mailto:criswell at cs.uiuc.edu>> wrote:
> Dear Tianwei,
>
> You can use the -analyze option to the opt tool to tell the DSA passes
> to store their results in files. When you use the -analyze option, the
> DSA passes will create a separate file for each function (and possible
2008 Apr 23
2
[LLVMdev] how to dump DSA graph in gdb?
On Wed, Apr 23, 2008 at 11:59 PM, John Criswell <criswell at cs.uiuc.edu>
wrote:
> Dear Tianwei,
>
> You can use the -analyze option to the opt tool to tell the DSA passes
> to store their results in files. When you use the -analyze option, the
> DSA passes will create a separate file for each function (and possible
> one file to hold the globals graph). For this reason,
2008 Apr 23
0
[LLVMdev] how to dump DSA graph in gdb?
Dear Tianwei,
You can use the -analyze option to the opt tool to tell the DSA passes
to store their results in files. When you use the -analyze option, the
DSA passes will create a separate file for each function (and possible
one file to hold the globals graph). For this reason, I recommend
running opt in a special empty directory because DSA will generate *a
lot* of files.
Second, to
2009 Dec 05
2
[LLVMdev] use-def chain questions
Hi, all,
We are working on a static analysis phase on LLVM's IR, we want to do a
backforward phase through the use-def chain, I knew that LLVM
had a built-in SSA form which provide the use-def chain for virtual register
variables, however, I want to know if you also provide some kinds of use-def
chain for memory operations? for example, I have the following source code
int foo(int *q, int
2009 Oct 15
2
[LLVMdev] strace for whole-program bitcodes
Tianwei <tianwei.sheng at gmail.com> writes:
> someone suggested me to use gold-plugin, I know nothing about it yet, I will
> have a try later. Does anyone have a good solution for this problem?
Afaik gold does not help here. I tried it and managed to only generate
native code.
I'm currently investigating an alternative approach to produce
whole-program bitcodes:
1) add
2009 Oct 15
0
[LLVMdev] strace for whole-program bitcodes
On Thu, Oct 15, 2009 at 7:14 AM, Timo Juhani Lindfors
<timo.lindfors at iki.fi> wrote:
> Tianwei <tianwei.sheng at gmail.com> writes:
>> someone suggested me to use gold-plugin, I know nothing about it yet, I will
>> have a try later. Does anyone have a good solution for this problem?
>
> Afaik gold does not help here. I tried it and managed to only generate
>
2009 Oct 16
2
[LLVMdev] strace for whole-program bitcodes
Daniel Dunbar wrote:
> On Thu, Oct 15, 2009 at 7:14 AM, Timo Juhani Lindfors
> <timo.lindfors at iki.fi> wrote:
>> Tianwei <tianwei.sheng at gmail.com> writes:
>>> someone suggested me to use gold-plugin, I know nothing about it yet, I will
>>> have a try later. Does anyone have a good solution for this problem?
>> Afaik gold does not help here. I
2014 Sep 14
2
[LLVMdev] Testing the new CFL alias analysis
In lto+pgo some (5 out of 12 with usual suspect like perlbench and gcc among them using -flto -Wl,-mllvm,-use-cfl-aa -Wl,-mllvm,-use-cfl-aa-in-codegen) the CINT2006 benchmarks don’t compile. Has the implementation been tested with lto? If not, please stress the implementation more.
Do we know reasons for gains? Where did you expect the biggest gains?
Some of the losses will likely boil down to
2007 Nov 23
1
[LLVMdev] how to dump a Instruction in gdb?
On Nov 23, 2007 5:29 PM, Duncan Sands <baldrick at free.fr> wrote:
> Hi,
>
> > I want to know how to dump the a instruction in gdb. I can dump a
> Module
> > use M.dump(), also is there any such print function which can be used in
> gdb
> > for a single instruction and its operand?
>
> you can dump most things in LLVM the same way as for a module: if I
2013 Jul 16
0
[LLVMdev] [Proposal] Parallelize post-IPO stage.
On 12 July 2013 15:49, Shuxin Yang <shuxin.llvm at gmail.com> wrote:
> Hi, There:
>
> This is the proposal for parallelizing post-ipo stage. See the following
> for details.
>
> I also attach a toy-grade rudimentary implementation. This
> implementation can be
> used to illustrate some concepts here. This patch is not going to be
> committed.
>
>
2009 Oct 29
0
[LLVMdev] strace for whole-program bitcodes
Hello everyone,
I'm working on passing parameters for gold/LTO plug-in and could add this one as well.
Just need an option name. Could anybody suggest one?
Viktor
----- Original Message -----
From: "Nick Lewycky" <nicholas at mxc.ca>
To: "Daniel Dunbar" <daniel at zuster.org>
Cc: "Kelly, Terence P (HP Labs Researcher)" <terence.p.kelly at
2014 Sep 15
2
[LLVMdev] Testing the new CFL alias analysis
On CINT2006 ARM64/ref input/lto+pgo I practically measure no performance difference for the 7 benchmarks that compile. This includes bzip2 (although different source base than in CINT2000), mcf, hmmer, sjeng, h364ref, astar, xalancbmk
On Sep 15, 2014, at 11:59 AM, Hal Finkel <hfinkel at anl.gov> wrote:
> ----- Original Message -----
>> From: "Gerolf Hoflehner"
2009 Oct 30
0
[LLVMdev] strace for whole-program bitcodes
--emit-llvm, if not conflict
>>> Paul Davey <plmdvy at gmail.com> 10/30/2009 11:11 AM >>>
--emit-llvm??
On Fri, Oct 30, 2009 at 7:55 AM, Viktor Kutuzov <vkutuzov at accesssoftek.com> wrote:
Hello everyone,
I'm working on passing parameters for gold/LTO plug-in and could add this one as well.
Just need an option name. Could anybody suggest one?
Viktor
2009 Oct 30
2
[LLVMdev] strace for whole-program bitcodes
--emit-llvm??
On Fri, Oct 30, 2009 at 7:55 AM, Viktor Kutuzov
<vkutuzov at accesssoftek.com>wrote:
> Hello everyone,
>
> I'm working on passing parameters for gold/LTO plug-in and could add this
> one as well.
> Just need an option name. Could anybody suggest one?
>
> Viktor
>
> ----- Original Message -----
> From: "Nick Lewycky" <nicholas at
2008 Apr 23
2
[LLVMdev] how to dump DSA graph in gdb?
Hi, all:
Recently I am debugging the DSA and want to learn how it work, and now I
am checking the local datastructure analysis.
I use the following command to print the graph:
(gdb) p g.dump()
digraph DataStructures {
label="Function addG";
Node0xe1f3a0 [shape=record,shape=Mrecord,label="{ i32: MRE\n|{<g0>}}"];
Node0xe1f4d0
2014 Sep 16
2
[LLVMdev] Testing the new CFL alias analysis
----- Original Message -----
> From: "Gerolf Hoflehner" <ghoflehner at apple.com>
> To: "Hal Finkel" <hfinkel at anl.gov>
> Cc: "LLVM Dev" <llvmdev at cs.uiuc.edu>, "Jiangning Liu" <liujiangning1 at gmail.com>, "George Burgess IV"
> <george.burgess.iv at gmail.com>
> Sent: Monday, September 15, 2014
2009 Oct 15
0
[LLVMdev] strace for whole-program bitcodes (was: RE: building whole-program bitcode with LLVM)
Hi, Kelly, Have you found the solution for this problem? I met a similar
problem when I were trying to test MySQL 5.0 with LLVM. The following is my
step, but still failed since llvm-ld can not recognize some gcc link flags.
1. during the configuration, use a script such as llvm-gcc.sh, at this time
the script only invoke the gcc. This is necessary because the gnu configure
will test the
2013 Jul 17
0
[LLVMdev] [Proposal] Parallelize post-IPO stage.
On Wed, Jul 17, 2013 at 1:06 PM, Shuxin Yang <shuxin.llvm at gmail.com> wrote:
>
> On 7/17/13 12:35 PM, Diego Novillo wrote:
>>
>> On Fri, Jul 12, 2013 at 3:49 PM, Shuxin Yang <shuxin.llvm at gmail.com>
>> wrote:
>>
>>> 3. How to parallelize post-IPO stage
>>> ====================================
>>>
>>> From 5k'
2013 Jul 17
2
[LLVMdev] [Proposal] Parallelize post-IPO stage.
On 7/17/13 12:35 PM, Diego Novillo wrote:
> On Fri, Jul 12, 2013 at 3:49 PM, Shuxin Yang <shuxin.llvm at gmail.com> wrote:
>
>> 3. How to parallelize post-IPO stage
>> ====================================
>>
>> From 5k' high, the concept is very simple, just to
>> step 1).divide the merged IR into small pieces,
>> step 2).and compile
2009 Dec 05
0
[LLVMdev] use-def chain questions
On Dec 5, 2009, at 4:02 AM, Tianwei wrote:
> Hi, all,
> We are working on a static analysis phase on LLVM's IR, we want to do a backforward phase through the use-def chain, I knew that LLVM
> had a built-in SSA form which provide the use-def chain for virtual register variables, however, I want to know if you also provide some kinds of use-def chain for memory operations? for