similar to: [LLVMdev] Destination register needs to be valid after callee saved register restore when tail calling

Hi Anton and Dale first thanks for your answers. On 8 Aug 2007, at 16:43, Anton Korobeynikov wrote: > Hello, Arnold. > >> Is there a way to indicate that the register the tail call >> instruction uses as destination needs to be valid after the callee >> saved registers have been restored? (some X86InstrInfo.td foo magic >> maybe ?) > It's wrong way to do the

Sent from my iPhone On Aug 8, 2007, at 10:46 AM, Arnold Schwaighofer <arnold.schwaighofer at gmail.com > wrote: > Hi Anton and Dale > first thanks for your answers. > > On 8 Aug 2007, at 16:43, Anton Korobeynikov wrote: > >> Hello, Arnold. >> >>> Is there a way to indicate that the register the tail call >>> instruction uses as destination

Hello, Arnold. > Is there a way to indicate that the register the tail call > instruction uses as destination needs to be valid after the callee > saved registers have been restored? (some X86InstrInfo.td foo magic > maybe ?) It's wrong way to do the things. Because in this case you either violate the ABI for callee, or you're restricted to do tail call lowering only for

tailcall optimization stop working in jit (lli) in revision 45527. i guess this is because the jit is tailjmping to the wrong function address. the following change would reenable tailcallopt in jit. But i am pretty sure that this is not the correct fix (since i don't really understand what is going on :). maybe evan can comment on this? regards arnold Index:

Hi Arnold, This is a very good first step! Thanks! Comments below. Evan Index: test/CodeGen/X86/constant-pool-remat-0.ll =================================================================== --- test/CodeGen/X86/constant-pool-remat-0.ll (revision 42247) +++ test/CodeGen/X86/constant-pool-remat-0.ll (working copy) @@ -1,8 +1,10 @@ ; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | count 3 ;

I would like to use the LLVM x86 code generator to emit Intel syntax that is compatible with Microsoft's MASM 9.x. Taking the TOT LLVM, from last week, I have found a number of changes that are required to make this work, most of which are straight forward but a couple I wanted to check with the group to see what people thought was the best thing to do. In particular, I have made all necessary

Hello, Arnold. > with the sentence i tried to express the question whether there is a > way to persuade the code generator to use another register to load (or > move) the function pointer to (right before the callee saved register > restore) but thinking a little further that's nonsense. Why don't define some special op for callee address and custom lower it? I really

2015-07-08 17:58 GMT+02:00 escha <escha at apple.com>: > [...] > > If you want to “revert" this sort of thing, you can do it at Select() time > or PreprocessISelDAG(), which is what I did on an out-of-tree backend to > turn add X, -C into sub X, C on selection time. This still lets all the > intermediate optimizations take advantage of the canonicalization. > >

We're working on integrating LLVM 3.1 and integrating our AVX improvements which we hope to send upstream. I am trying to make sure we do't lose functionality of performance. Somewhere between LLVM 2.9 and LLVM 3.1 a bunch of opcodes got removed from isTargetShuffle in X86ISelLowering.cpp. It looks like at one point isTargetShuffle got removed completely so it is very difficult to mine

Ok, after a long detour I am back to where I have started. I think there is a problem at dep DAG construction. Let me try to convince you. Here is the C code we are dealing with: push () { struct xx_stack *stack, *top; for (stack = xx_stack; stack; stack = stack->next) top = stack; yy_instr = top->first; } If the loop never iterates, "top" will have

Sergei, Absolutely right, the copy/ldriw should not be reordered. I was attempting to explain that I consider it a phi-elimination bug, not a DAG builder bug. Liveness will also have problems with this code in the long run. To avoid confusion, I filed PR13112: Phi elimination generates uninitialized vreg uses, and disabled the SSA check until its fixes in r158461. However, your C code is also

Andy, You are probably right here - look at this - before phi elimination this code looks much more sane: # *** IR Dump After Live Variable Analysis ***: # Machine code for function push: SSA Function Live Outs: %R0 BB#0: derived from LLVM BB %entry %vreg5<def> = IMPLICIT_DEF; IntRegs:%vreg5 %vreg4<def> = TFRI_V4 <ga:@xx_stack>; IntRegs:%vreg4

FAIL: /usr/home/llvm/obj/../test/Regression/CodeGen/X86/2004-02-22-Casts.llx: Assertion failed: (isNew && "Got into the map somehow?"), function AddLegalizedOperand, file /usr/home/llvm/obj/../lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, line 79. .text .align 16 .globl test1 .type test1, @function test1: fldl 4(%esp) ftst

Hi, Shuguang Feng wrote: > Thanks for such a rapid response! > >> Don't know about Passes in the backend, but this could be a problem of >> an FunctionPassManager trying to use a ModulePass. > > I manually applied the patch you provided for llc (I'm using the 2.5 > release of LLVM not ToT) and it fixed my compilation error. When your > patch replaced the

On Jun 13, 2012, at 1:15 PM, Sergei Larin <slarin at codeaurora.org> wrote: > Andy, > > You are probably right here – look at this – before phi elimination this code looks much more sane: > > # *** IR Dump After Live Variable Analysis ***: > # Machine code for function push: SSA > Function Live Outs: %R0 > > BB#0: derived from LLVM BB %entry >

On Oct 20, 2010, at 11:53 AM, Dan Gohman wrote: > > On Oct 19, 2010, at 8:00 PM, Jakob Stoklund Olesen wrote: >> >> >> One problem is that calling conventions are handled while building the selection DAG, and the DAG doesn't really know to represent clobbered registers. >> >> Perhaps X86TargetLowering::LowerCall() could decorate the X86ISD::CALL node

> What does "llc -debug-pass=Structure" say? Is the ProfileLoaderPass > really the last pass to touch the ProfileInfo before you are using it? Below is the sequence of passes that I see. Although the NoProfileInfo pass is being run, it should be subsequently overridden by ProfileInfoLoaderPass (LoaderPass) correct? Target Data Layout Create Garbage Collector Module Metadata

Shuguang Feng wrote: >> What does "llc -debug-pass=Structure" say? Is the ProfileLoaderPass >> really the last pass to touch the ProfileInfo before you are using it? > > Below is the sequence of passes that I see. Although the > NoProfileInfo pass is being run, it should be subsequently overridden > by ProfileInfoLoaderPass (LoaderPass) correct? Yes. >

> It *is* allowed to access ModulePass analysis information from an > FunctionPass? BasicBlockPlacement (a FunctionPass) also accesses the profile information and I assumed it worked (but haven't independently verified this). > Can you try to manually override the PI value in the > MyCodeGenPass::runOnMachineFunction() to the value seen in llc and then > access the