similar to: [LLVMdev] Adding custom operation intrinsic for ASIP architectures.

Hi, I was talking with aKor in #llvm how we could implement custom operation support for our ASIP architecture. We came into solution that the best way would be to write new custom operation intrinsic and optimization pass for raising certain type of function calls to those intrinsics (similar to raising mallocs). Basically our custom operation are like calls, with operand name and multiple

On Tue, 31 Jul 2007, [ISO-8859-1] Mikael Lepist� wrote: > I was talking with aKor in #llvm how we could implement custom operation > support for our ASIP architecture. We came into solution that the best > way would be to write new custom operation intrinsic and optimization > pass for raising certain type of function calls to those intrinsics > (similar to raising mallocs). >

Chris Lattner wrote: > On Tue, 31 Jul 2007, [ISO-8859-1] Mikael Lepist� wrote: >> I was talking with aKor in #llvm how we could implement custom operation >> support for our ASIP architecture. We came into solution that the best >> way would be to write new custom operation intrinsic and optimization >> pass for raising certain type of function calls to those intrinsics

On Wed, 1 Aug 2007, [UTF-8] Mikael Lepist? wrote: >> def MOVNTPSmr : PSI<0x2B, MRMDestMem, (outs), (ins i128mem:$dst, >> VR128:$src), >> "movntps {$src, $dst|$dst, $src}", >> [(int_x86_sse_movnt_ps addr:$dst, VR128:$src)]>; >> >> There is corresponding code in llvm-gcc to tell GCC how to handle this >> builtin. Is this what you're

Chris Lattner wrote: > On Wed, 1 Aug 2007, [UTF-8] Mikael Lepist? wrote: > >>> def MOVNTPSmr : PSI<0x2B, MRMDestMem, (outs), (ins i128mem:$dst, >>> VR128:$src), >>> "movntps {$src, $dst|$dst, $src}", >>> [(int_x86_sse_movnt_ps addr:$dst, VR128:$src)]>; >>> >>> There is corresponding code in llvm-gcc to tell GCC how to

Hello, I want to compile a LLVM file into an executable running on ARM platform. I use LLVM 2.0 with the following command lines: llvm-as -f -o test.bc test.ll llc -march=arm -mcpu=arm1136j-s -mattr=+v6 -f -o test.s test.bc arm-linux-gnu-as -mcpu=arm1136j-s test.s With the last command, I obtain the following error: rd and rm should be different in mul The bad instruction is

Hi Mikael, You are obtaining warning, not an error, right? The most arm cores, including arm1136, can execute mul with rd = rm. So, you can ignore this warning. Lauro 2007/6/12, Peltier, Mikael <m-peltier at ti.com>: > > > > > Hello, > > > > I want to compile a LLVM file into an executable running on ARM platform. > > I use LLVM 2.0 with the following

On May 22, 2014, at 3:51 PM, Chandler Carruth <chandlerc at google.com> wrote: > > On Thu, May 22, 2014 at 4:42 PM, Louis Gerbarg <lgg at apple.com> wrote: > The problem that the above transform is technically illegal because “When indexing into a (optionally packed) structure, only i32 integer constants are allowed (when using a vector of indices they must all be the same

Hi, Anybody has an opinion would it be good thing to add support for llvm- gcc to be able to be built with existing llvm installation? Right now building works with llvm installation also, but only if llvm libs and includes are installed under the same prefix, even though this seems to be unintended functionality. So after support for building llvm-gcc without llvm sources it would be

----- Original Message ----- > From: "Chandler Carruth" <chandlerc at google.com> > To: "Louis Gerbarg" <lgg at apple.com> > Cc: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > Sent: Thursday, May 22, 2014 7:09:49 PM > Subject: Re: [LLVMdev] RFC: Indexing of structs vs arrays in getelementpointer > > > > >

Recently I posted a patch to migrate certain GEPs between basic blocks in cases where doing so would improve the ability of instcombine to merge into more complicated addressing mode (r209049 and r209065). After some build to failures it was rolled back. I now have a patch that no longer causes the regressions I was seeing, but it also no longer can optimize the case I was trying to optimize. As

Dear all, I would have a proposal for adding a project to the page http://llvm.org/ProjectsWithLLVM/. We successfully use LLVM as a base for a retargetable compiler and below is some information on the project. If you would have any comments, questions or if we should improve the text below, please let me know. --- Codasip Studio By Codasip Ltd. (link https://www.codasip.com/) Codasip

Hi, I've been hitting my head to wall two days now. This is practically my first contact with InstrInfo.td files. Is there any tutorial how to make this kind of stuff? Or should I just keep on studying Sparc and other backends? So I added new intrinsic to llvm/include/llvm/TCEInstrinsics.td: def int_tce_customop : Intrinsic<[llvm_void_ty, llvm_ptr_ty, llvm_vararg_ty], [],

I'm attempting to modify a parser generator to emit LLVM code instead of C. So far the experience has been trivial, but I am now running into an error regarding labels that I can't seem to solve. Situation 1: A label is used immediately after a void function call (l6 in this case): <snip> %tmp26 = load i32* @yybegin, align 4 %tmp27 = load i32* @yyend, align 4 call void

> From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of JF Bastien via [..] > Is it relevant to any modern compiler though? > > I strongly agree with Tim. As I said in previous threads, unless people will have > actual testable targets for this type of thing, I think we shouldn’t add > maintenance burden. This isn’t really C or C++ anymore because so much code

On Wed, 2019-10-30 at 15:30 -0700, Chris Lattner via llvm-dev wrote: > > On Oct 30, 2019, at 3:07 AM, Jeroen Dobbelaere via llvm-dev < > > llvm-dev at lists.llvm.org> wrote: > > > > > From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of JF > > > Bastien via > > > > [..] > > > Is it relevant to any modern compiler

We are working on a backend for an ILP architecture, and at some point we would like to do some sort of region scheduling. To support region formation, we need to collect profiling information. I took a look at the bitcode interpreter, and it is fairly trivial to make it collect profiling data Our target is an ASIP for embedded applications, so it would typically be simulated during software

This idea is intruiging... Suppose one has a set of file servers called A, B, C, D, and so forth, all running CentOS 6.5 64-bit, all being interconnected with 10GbE. These file servers can be divided into identical pairs, so A is the same configuration (diks, processors, etc) as B, C the same as D, and so forth (because this is what I have; there are ten servers in all). Each file server has

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 [please cc to my address] Dear Samba and Netatalk experts, I've got a server running both samba 2.2.3a as PDC and netatalk (1.5pre7 as supplied by SuSE73). Samba machine accounts are added to /etc/passwd automatically by the command add user script = /usr/sbin/useradd -d /dev/null -g 90 -s /bin/false -M %u when a NT machine is added to the

Hello gyus, I am working on a project, where we are trying to create a development environment for new ASIP processor design. Part of this project is a compiler generator, where we would like to generate C compiler from some instruction description. To keep it short, let's say, that in each instruction's semantics is described by some C code. What I would like to do is to compile this