Displaying 20 results from an estimated 10000 matches similar to: "[LLVMdev] ILP register allocator"
2007 Nov 25
1
[LLVMdev] global register allocation.
Thanks again. One more question here:
Since the regalloc works once per function, do I stil have access to
the Call graph?
Just saving information between regalloc passes for different
functions may not be enough for my case. I will need to maintain the
regalloc info of various passes in the call graph order.
Anyways thanks for your inputs. I will get back if I need to learn more.
Sanjiv
On Nov
2007 Nov 23
2
[LLVMdev] global register allocation.
On 11/23/07, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote:
>
>
> Hi, Sanjiv,
>
> those passes operate on the whole machine function. Each machine
> function contains many basic blocks. If a program has many functions, the
> register allocator will be called as many times, i.e it does not do
> interprocedural allocation.
>
> best,
>
>
2007 Nov 23
0
[LLVMdev] global register allocation.
Hi, again,
I think you can do it in the same way that the other allocators have
been coded, i.e extend RA, register the pass and so forth. I am not sure
about the best way to pass information among a run of RegAlloc to the
other, maybe the other guys in the list could suggest something. Yet, you
can always dump it into a file, and read it again, everytime it is
necessary. Remember that
2007 Aug 18
0
[LLVMdev] Debugger for Register Allocation
On Aug 17, 2007, at 4:17 PM, Fernando Magno Quintao Pereira wrote:
>
> Hi guys,
>
> I have been using a debugger for my register allocator. The
> debugger
> happened to be very useful at catching register assignment errors.
> I've
> put the debugger on-line, if anyone who is working with register
> allocation wants to use. The debugger itself has nothing to
2007 Aug 17
2
[LLVMdev] Debugger for Register Allocation
Hi guys,
I have been using a debugger for my register allocator. The debugger
happened to be very useful at catching register assignment errors. I've
put the debugger on-line, if anyone who is working with register
allocation wants to use. The debugger itself has nothing to do with LLVM,
but I've coded a spiller that prints the code in a format that the
debugger can read. The
2006 Aug 22
0
[LLVMdev] Adding register allocator to LLVM
I managed to link my RegAlloc.a library to llc tool but can;t make the
same with lli tool.
Should I use USEDLIBS variable in lli makefile (like llc) or there is
another way?
On 8/20/06, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote:
>
>
> Dear Anton,
>
> you can add your register allocator strait iin the
> "lib/CodeGen/Passes.cpp", and then
2006 Sep 03
2
[LLVMdev] Testing a register allocator
Hi again!
I've managed to run the llvm-test with the options Fernando told.
What I did was the following:
I changed llc regalloc option in TEST.llc.makefile to my allocator.
I changed LLCBETAOPTION in makefile.programs file for all architechtures to
use my allocator.
I run make TEST=nightly report.html and got all tests under LLCBETA failed
('*' symbol). Though I know that my
2006 Sep 02
0
[LLVMdev] Testing a register allocator
> Hi!
>
> I developed a register allocator within LLVM and now I need to test its
> efficiency. Can I do this using llvm-test package?
> Do llvm tests check all available regalloc options automatically? If not,
> then what modifications should I do to the test files?
> It would be great if I could test my algo along with linearscan and compare
> the results.
>
>
2006 Aug 20
2
[LLVMdev] Adding register allocator to LLVM
Dear Anton,
you can add your register allocator strait iin the
"lib/CodeGen/Passes.cpp", and then 're-make' it: "makellvm llc", on the
top of lib/CodeGen. It is faster than running make from LLVMOBJDIR. The
problem is that it only add to llc the changes on the lib/CodeGen
directory. If you change other parts, a make from LLVMOBJDIR will
synchronize it.
Try adding
2007 Apr 18
1
[LLVMdev] Regalloc Refactoring
Who's your advisor?
-scooter
(aka "Dr. B. Scott Michel, UCLA CS 2004" :-)
On Apr 12, 2007, at 4:39 PM, Fernando Magno Quintao Pereira wrote:
>
>>> And I have a quite fast algo that I believe is simpler than
>>> [Budimlic02]
>>> and I can share it with you :)
>>
>> Do you have a paper on this? I'd be interested in seeing it.
2007 Apr 12
0
[LLVMdev] Regalloc Refactoring
>> And I have a quite fast algo that I believe is simpler than [Budimlic02]
>> and I can share it with you :)
>
> Do you have a paper on this? I'd be interested in seeing it.
>
Yes, I have a tech report on this page:
http://compilers/fernando/projects/soc/
and I have submitted a paper to SAS, and now I am waiting for the review.
The coalescing algorithm is described in
2007 Jul 19
0
[LLVMdev] New Register Allocation Algorithm
Hi Fernando,
On Jul 18, 2007, at 10:57 AM, Fernando Magno Quintao Pereira wrote:
>
> Dear LLVMers,
>
> we here in the UCLA compiler's lab have an implementation of a
> very
> cool register allocator in LLVM. It finds an optimal register
> assignment
> for the x86 machine, via live range splitting, that is, if it is
> possible
> to have a register
2007 Jul 04
0
[LLVMdev] Swaps of FP registers
On 7/3/07, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote:
>
> what is the best way to implement a swap of floating point registers
> in X86? For the integer registers, I am using xchg. Is there a similar
> instruction for floating point?
FXCH swaps stN with st0, but you'd have to use memory for arbitrary swaps I
believe. I have no idea if it's the
2008 May 16
0
[LLVMdev] 64-bit to 32-bit conversion of pointers
On Thu, May 15, 2008 at 5:45 PM, Fernando Magno Quintao Pereira
<fernando at cs.ucla.edu> wrote:
>
> Guys, I need advice in how to handle a problem.
>
> The problem:
> In X86_64, pointers are 64-bit variables, and are stored into 64-bit
> registers. However, some pointers are small enough that they can be
> represented as 32-bit values.
> Is there some way, in
2007 Nov 23
0
[LLVMdev] global register allocation.
Hi, Sanjiv,
those passes operate on the whole machine function. Each machine
function contains many basic blocks. If a program has many functions, the
register allocator will be called as many times, i.e it does not do
interprocedural allocation.
best,
Fernando
> As far as I understand , the regalloc passes provided operate on basic block
> level?
> Is there anything that
2007 Sep 05
0
[LLVMdev] Dynamically alternating between register allocators
Hi Fernando,
To do this you would need to change the register allocation pass on
the fly. I don't think this is currently possible. Someone please
correct me if I am wrong.
I would like to see hierarchical pass capability built into pass
manager. This allows us to group live variables, phi lowering, two-
address, lower subreg, live interval analysis, coalescing, allocation,
and
2007 Apr 12
4
[LLVMdev] Regalloc Refactoring
> And I have a quite fast algo that I believe is simpler than [Budimlic02]
> and I can share it with you :)
Do you have a paper on this? I'd be interested in seeing it.
-Tanya
>
> Fernando
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
>
2007 Jul 03
2
[LLVMdev] Swaps of FP registers
Dear guys,
what is the best way to implement a swap of floating point registers
in X86? For the integer registers, I am using xchg. Is there a similar
instruction for floating point?
My function to insert swaps is like:
void X86RegisterInfo::swapRegs(
MachineBasicBlock & mbb,
MachineBasicBlock::iterator mi,
unsigned r1,
unsigned r2,
const TargetRegisterClass
2007 Jul 18
2
[LLVMdev] New Register Allocation Algorithm
Dear LLVMers,
we here in the UCLA compiler's lab have an implementation of a very
cool register allocator in LLVM. It finds an optimal register assignment
for the x86 machine, via live range splitting, that is, if it is possible
to have a register assignment without register spilling, our allocator can
find it.
We have the short and long versions of our paper here:
2008 May 16
2
[LLVMdev] 64-bit to 32-bit conversion of pointers
Guys, I need advice in how to handle a problem.
The problem:
In X86_64, pointers are 64-bit variables, and are stored into 64-bit
registers. However, some pointers are small enough that they can be
represented as 32-bit values.
Is there some way, in LLVM, to recognize which pointers can be stored
into 32-bit registers, and so modify their class accordingly? Any ideas or
hints would