similar to: [LLVMdev] Moving data between regs

The short answer is this is not currently done. LLVM register allocator does not currently use a move to a different register class in lieu of spills. This is definitely something we should do in the future. Can you file a bugzilla enhancement request? Thanks, Evan On Jun 13, 2007, at 11:09 AM, Chris Lattner wrote: > On Tue, 12 Jun 2007, Fernando Magno Quintao Pereira wrote: >>

On Tue, 12 Jun 2007, Fernando Magno Quintao Pereira wrote: > Imagine that I have a virtual v stored in register AL, and I am about > to cross a function call, that effectively overwrites AL. Well, I have, > say, register ESI free, but as it happens, ESI is bigger than AL. It > should be technically possible to move the contents of AL into ESI, to > avoid spilling 'v',

Does this depend on vreg subreg support? It sounds as if it could be vaguely related, but I'm not sure it's necessary. -- Chris On Jun 14, 2007, at 12:27 PM, Evan Cheng wrote: > The short answer is this is not currently done. LLVM register > allocator does not currently use a move to a different register class > in lieu of spills. This is definitely something we should do in

Hey, guys, I am creating some move instructions with MRegisterInfo::copyRegToReg. How do I get a pointer to the instruction that I just created? Is there a way to do something like: // mbb is MachineBasicBlock, reg_info is MRegisterInfo MachineBasicBlock::iterator iter = mbb.getFirstTerminator(); reg_info->copyRegToReg(mbb, iter, dst, src, rc); iter--; (???) MachineInstr *

Dear llvmers, I am trying to insert a move instruction where both source and destination registers are physical registers. How is the code for this? I tried this one here: void PhiDeconstruction_Fer::add_move ( MachineFunction & mf, MachineBasicBlock & mbb, unsigned

Thank you Chris. I will try to implement the TwoAddress pass to run on machine code. Why it has not been originally implemented to run on machine code? Is there anything that makes it troublesome after RA has been performed? Could you tell me if the transformations below are correct? 1) a := b op c --> a := b --> a := b a := a op c a

copyRegToReg() always insert the move instruction before "iter". Just use prior(iter) after the insertion to reference the newly created move instruction. Evan On Feb 21, 2007, at 11:17 PM, Fernando Magno Quintao Pereira wrote: > > Hey, guys, I am creating some move instructions with > MRegisterInfo::copyRegToReg. How do I get a pointer to the instruction > that I just

> > Thank you Chris. I will try to implement the TwoAddress pass to run on > > machine code. Why it has not been originally implemented to run on > > machine code? > > I'm not sure what you mean. It definitely does run on machine code. I was thinking that it only transformed instructions with virtual registers because of this code in the TwoAddressInstructionPass.cpp:

On Sun, 2 Jul 2006, Fernando Magno Quintao Pereira wrote: > MachineBasicBlock::iterator iter = mbb.getFirstTerminator(); > const TargetRegisterClass *rc = mf.getSSARegMap()->getRegClass(dst); > const MRegisterInfo * reg_info = mf.getTarget().getRegisterInfo(); > reg_info->copyRegToReg(mbb, iter, dst, src, rc); > } > > But the getRegClass method seems to

> On Sun, 2 Jul 2006, Fernando Magno Quintao Pereira wrote: > > > MachineBasicBlock::iterator iter = mbb.getFirstTerminator(); > > const TargetRegisterClass *rc = mf.getSSARegMap()->getRegClass(dst); > > const MRegisterInfo * reg_info = mf.getTarget().getRegisterInfo(); > > reg_info->copyRegToReg(mbb, iter, dst, src, rc); > > } > > >

On 11/23/07, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: > > > Hi, Sanjiv, > > those passes operate on the whole machine function. Each machine > function contains many basic blocks. If a program has many functions, the > register allocator will be called as many times, i.e it does not do > interprocedural allocation. > > best, > >

>> I've built a pass to split critical edges of machine functions, and I have >> to insert new basic blocks. Some of them will have MBB->begin() == >> MBB->end(). > > Ah, machine basic blocks are different. They *are* allowed to be empty. > I would like to build an "insertNoOp" and add it to MRegisterInfo. I would have one for each target. For the

Dear LLVMers, we here in the UCLA compiler's lab have an implementation of a very cool register allocator in LLVM. It finds an optimal register assignment for the x86 machine, via live range splitting, that is, if it is possible to have a register assignment without register spilling, our allocator can find it. We have the short and long versions of our paper here:

Hi, again, I think I got around this problem of discovering the class of a physical register. I am using this code here: void PhiDeconstruction_Fer::add_move (MachineBasicBlock & mbb, unsigned src, unsigned dst) { MachineBasicBlock::iterator iter = mbb.getFirstTerminator(); const MRegisterInfo * reg_info =

Hi, again, I think you can do it in the same way that the other allocators have been coded, i.e extend RA, register the pass and so forth. I am not sure about the best way to pass information among a run of RegAlloc to the other, maybe the other guys in the list could suggest something. Yet, you can always dump it into a file, and read it again, everytime it is necessary. Remember that

On Thu, 12 Apr 2007, Fernando Magno Quintao Pereira wrote: >> I'm definitely interested in improving coalescing and it sounds like >> this would fall under that work. Do you have references to papers >> that talk about the various algorithms? > > Some suggestions: > > @InProceedings{Budimlic02, > AUTHOR = {Zoran Budimlic and Keith D. Cooper and Timothy

Thanks again. One more question here: Since the regalloc works once per function, do I stil have access to the Call graph? Just saving information between regalloc passes for different functions may not be enough for my case. I will need to maintain the regalloc info of various passes in the call graph order. Anyways thanks for your inputs. I will get back if I need to learn more. Sanjiv On Nov

>> I am in need of a no-op instruction: an instruction that does not do >> anything, and has no operands. Does LLVM predefine such an instruction? I >> want to transform the program so that there is no empty basic block. > > You can never have an empty basic block. All BBs must have a TerminatorInst. > I've built a pass to split critical edges of machine

Chris Lattner wrote: > On Thu, 12 Apr 2007, Fernando Magno Quintao Pereira wrote: >>> I'm definitely interested in improving coalescing and it sounds like >>> this would fall under that work. Do you have references to papers >>> that talk about the various algorithms? >> Some suggestions: >> >> @InProceedings{Budimlic02, >> AUTHOR =

Hey all, is there a simple way to alternate between different register allocators at run time? I would like to decide dynamically which register allocator to use. The decision is based on information that is produced by a pass that executes before register allocation takes place. Is it possible to modify RegisterRegAlloc::Registry to take into consideration this information? Is there