Displaying 20 results from an estimated 1000 matches similar to: "[LLVMdev] Misc optimization issue"
2008 Dec 09
1
[LLVMdev] scalar-evolution + indvars fail to get the loop trip count?
Hi,
Seems pass scalar-evolution+indvars fail to get the loop trip count of the
following case:
int foo(int x, int y, int lam[256], int alp[256]) {
int i;
int z = y;
for (i = 255; i >= 0; i--) {
z += x;
lam[i] = alp[i];
}
return z;
}
The final optimized ll code is :
define i32 @foo(i32 %x, i32 %y, i32* %lam, i32* %alp) nounwind {
entry:
br label %bb
bb:
2012 Nov 26
2
[LLVMdev] LSR pass
Hi,
I would like some help regarding the LSR pass. It seems that it likes to duplicate address calculations as in the case above, which is highly undesirable on my target.
I wonder if there is any way to tell LSR to not duplicate the code in cases like this? Or could I perhaps run CSE after LSR again?
What is the logic behind this transformation? It seems that a LSR pass should not insert a
2011 Jul 07
1
[LLVMdev] code generation removes duplicated instructions
Ok. Let me describe the problem again in some detail.
The following is the original bitcode from a real testcase:
bb7:
%46 = load i32* %j, align 4
%47 = add nsw i32 %46, 1
store i32 %47, i32* %j, align 4
br label %bb8
To protect the operand of the store I duplicate the input chain of operands
and insert a comparison to check whether the operand of the stores are
correct. As a result of
2010 Sep 10
1
[LLVMdev] Missing Optimization Opportunities
Hi,
I'm using LLVM 2.7 right now, and I found "opt -std-compile-opts" has
missed some opportunities for optimization:
define void @spa.main() readonly {
entry:
%tmp = load i32* @dst-ip ; <i32> [#uses=3]
%tmp1 = and i32 %tmp, -16777216 ; <i32> [#uses=1]
%tmp2 = icmp eq i32 %tmp1, 167772160 ; <i1> [#uses=2]
2010 Jun 29
0
[LLVMdev] Confuse on getSCEVAtScope
On Jun 29, 2010, at 7:08 AM, ether zhhb wrote:
>
> why computeSCEVAtScope not try to get the operands in the current
> scope like the function do with SCEVCommutativeExpr, like:
>
> if (const SCEVAddRecExpr *AddRec = dyn_cast<SCEVAddRecExpr>(V)) {
> if (!L || !AddRec->getLoop()->contains(L)) {
> ...
> // Then, evaluate the AddRec.
>
2010 Jun 29
2
[LLVMdev] Confuse on getSCEVAtScope
hi all,
i have SCEVAddRec
{{(32 + @edge.8265),+,32}<Loop0>,+,4}<Loop1>
where Loop0 and Loop1 are brothers (loops at the same level of the
loopnest), and Loop0 have a computable backedge taken count.
when i call getSCEVAtScope({{(32 +
@edge.8265),+,32}<Loop0>,+,4}<Loop1> , Loop1), it just give me a
{{(32 + @edge.8265),+,32}<Loop0>,+,4}<Loop1>,
instead of
2010 May 08
2
[LLVMdev] Remove identical or redundant basic blocks?
Dear all,
after optimizing a small LLVM example program (i.e., with opt -O3), the
resulting code contains several basic blocks, which I consider identical
or redundant. For instance,
return: ; preds = %min.exit
ret i32 0
bb15: ; preds = %min.exit
ret i32 0
or,
bb7.i:
2010 Nov 23
1
[LLVMdev] Unrolling loops into constant-time expressions
Hello,
I've come across another example:
I'm compiling with
clang -S -emit-llvm -std=gnu99 -O3
clang version 2.9 (trunk 118238)
Target: x86_64-unknown-linux-gnu
Thread model: posix
I take the code:
int loops(int x) {
int ret = 0;
for(int i = 0; i < x; i++) {
for(int j = 0; j < x; j++) {
ret += 1;
}
}
return ret;
}
and the
2009 Aug 28
1
[LLVMdev] va_arg
I would like to be able to instrument va_arg, but when I generate a bc
file for a test case using:
llvm-gcc -O3 -emit-llvm vararg.c -c -o vararg.bc
I do not see va_arg. Instead, it seems the args are accessed through
%struct.__va_list_tag, which makes things a bit trickier to
instrument. Is there a way to force llvm-gcc to use va_arg?
Perhaps there is some documentation about va_list_tag or
2010 May 08
0
[LLVMdev] Remove identical or redundant basic blocks?
The branch folding pass does this, but it operates later, on the
target-dependent form in llc.
On May 8, 2010, at 8:48 AM, Heinz Riener wrote:
> Dear all,
>
> after optimizing a small LLVM example program (i.e., with opt -O3),
> the
> resulting code contains several basic blocks, which I consider
> identical
> or redundant. For instance,
>
> return:
2010 May 08
2
[LLVMdev] Remove identical or redundant basic blocks?
Would it make sense to have a similar pass that operates on llvm main IR?
On Sat, May 8, 2010 at 5:15 PM, Dale Johannesen <dalej at apple.com> wrote:
> The branch folding pass does this, but it operates later, on the
> target-dependent form in llc.
>
> On May 8, 2010, at 8:48 AM, Heinz Riener wrote:
>
>> Dear all,
>>
>> after optimizing a small LLVM example
[LLVMdev] A question about GetElementPtr common subexpression elimination/loop invariant code motion
2007 Jan 29
2
[LLVMdev] A question about GetElementPtr common subexpression elimination/loop invariant code motion
Hello.
I have a problem which is quite basic for array optimization, amd I
wonder whether I am missing something, but I could not
find the LLVM pass that does it.
Consider the following code snippet:
int test()
{
int mat[7][7][7];
int i,j,k,sum=0;
for(i=0;i<7;i++){
for(j=0;j<7;j++){
for(k=0;k<7;k++){
sum+=mat[i][j][k]^mat[i][j][k^1];
}
}
}
return
2010 May 09
0
[LLVMdev] Remove identical or redundant basic blocks?
Eugene Toder wrote:
> Would it make sense to have a similar pass that operates on llvm main IR?
>
The unify exit return node (-mergereturn?) pass should take care of the
first example. The -simplifycfg option might take care of the second
example. Both work on LLVM IR.
-- John T.
> On Sat, May 8, 2010 at 5:15 PM, Dale Johannesen <dalej at apple.com> wrote:
>
>>
2015 Jun 11
4
[LLVMdev] Question about NoWrap flag for SCEVAddRecExpr
[+Arnold]
> On Jun 10, 2015, at 1:29 PM, Sanjoy Das <sanjoy at playingwithpointers.com> wrote:
>
> [+CC Andy]
>
>> Can anyone familiar with ScalarRevolution tell me whether this is an
>> expected behavior or a bug?
>
> Assuming you're talking about 2*k, this is a bug. ScalarEvolution
> should be able to prove that {0,+,4} is <nsw> and
2011 Nov 21
1
[LLVMdev] Fwd: Order of Basic Blocks
---------- Forwarded message ----------
From: Ryan Taylor <ryta1203 at gmail.com>
Date: Mon, Nov 21, 2011 at 10:30 AM
Subject: Re: [LLVMdev] Order of Basic Blocks
To: Benjamin Kramer <benny.kra at googlemail.com>
This worked, though the RPO_iterator apparently wasn't what I was looking
for anyways, it seems it doesn't rreally go top->down.
I have a simple example code,
2013 Oct 27
2
[LLVMdev] Missed optimization opportunity with piecewise load shift-or'd together?
The following piece of IR is a fixed point for opt -std-compile-opts/-O3:
---
target datalayout =
"e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind readonly
define i32 @get32Bits(i8*
2007 Jun 12
3
[LLVMdev] ARM backend problem ?
Hello,
I want to compile a LLVM file into an executable running on ARM platform.
I use LLVM 2.0 with the following command lines:
llvm-as -f -o test.bc test.ll
llc -march=arm -mcpu=arm1136j-s -mattr=+v6 -f -o test.s test.bc
arm-linux-gnu-as -mcpu=arm1136j-s test.s
With the last command, I obtain the following error:
rd and rm should be different in mul
The bad instruction is
2007 Jun 12
0
[LLVMdev] ARM backend problem ?
Hi Mikael,
You are obtaining warning, not an error, right? The most arm cores,
including arm1136, can execute mul with rd = rm. So, you can ignore
this warning.
Lauro
2007/6/12, Peltier, Mikael <m-peltier at ti.com>:
>
>
>
>
> Hello,
>
>
>
> I want to compile a LLVM file into an executable running on ARM platform.
>
> I use LLVM 2.0 with the following
2008 Jan 06
4
[LLVMdev] Another memory fun
hm.... I think, that is valid in c
but next code too doesn't works right:
; ModuleID = 'sample.lz'
@.str1 = internal global [6 x i8] c"world\00" ; <[6 x i8]*>
[#uses=1]
@.str2 = internal global [7 x i8] c"hello \00" ; <[7 x i8]*>
[#uses=1]
@.str7 = internal global [7 x i8] c"father\00" ; <[7 x i8]*>
[#uses=1]
2009 Sep 13
2
[LLVMdev] PIC16 question
In my ongoing work on refactoring the asmprinters, I've found that
PIC16 doesn't put ':' after labels in some cases. Specifically, it
looks like basic block labels are emitted without a ':':
movwf @__floatunsidf.frame. + 2
movlp .BB1_2
goto .BB1_2
.BB1_2 ; %bb7
movlw 0
banksel @__floatunsidf.frame.
but that