similar to: [LLVMdev] YABCFC

Hi, From the file HowToUseJIT.cpp, I learned how to insert some calcuation IR code like Add/Sub/Mul etc by using Instruction *Add = BinaryOperator::createAdd(One, ArgX, "addresult", BB); By following this way, it works well when I insert some IR code whose operand is integer type like IntTy, however, when I tried to insert similar thing whose operands are float point, I got the

July Status Update ------------------ Hi everyone! This month has been a busy month of cleanups and refinements, and marks over a year of LLVM status updates :). LLVM is getting substantially smaller (in memory footprint) and faster, received a few cool new features, and has a few more fixed bugs. We are currently thinking about unleashing the LLVM 1.3 release in about 3-4 weeks from now. If

Hi... I'm having some trouble with an IR instruction. I'm triying to modify it. I was trying to create a BinaryOperator "op" with some operands from Instruction "inst": op = BinaryOperator::Create(Instruction::Add,cast<Value>(inst->getOperand(0)),cast<Value>(r),inst->getNameStr(),inst); But when executed, my pass throw a segfault and a stacktrace:

Hi all, I have a question regarding a transformation that is carried out in InstCombine, which has been introduced by r48715. It unfolds expressions of the form `zext(or(icmp, (icmp)))` to `or(zext(icmp), zext(icmp)))` to expose pairs of `zext(icmp)`. In a subsequent iteration these `zext(icmp)` pairs could then (possibly) be optimized by another optimization (which has already been there before

Hi Sanjay, > Am 02.08.2016 um 21:39 schrieb Sanjay Patel <spatel at rotateright.com>: > > Hi Matthias - > > Sorry for the delayed reply. I think you're on the right path with D22864. No problem, thank you for your answer! > If I'm understanding it correctly, my foo() example and zext_or_icmp_icmp() will be equivalent after your patch is added to InstCombine.

Hi Sanjay, thank you a lot for your answer. I understand that in your examples it is desirable that `foo` and `goo` are canonicalized to the same IR, i.e., something like `@goo`. However, I still have a few open questions, but please correct me in case I'm thinking in the wrong direction. > Am 21.07.2016 um 18:51 schrieb Sanjay Patel <spatel at rotateright.com>: > > I've

Andy, Here is the left circular shift operator patch. I apologize to the reviewer in advance. The patch has a good bit of fine detail. Any comments/criticisms? Some caveats... 1) This is just the bare minimum needed to make the left circular shift operator work (e.g. no instruction combining). 2) I tried my best to select operator names in the existing style; please feel free to change them as

Hi, I am working on PR34474 and try to add a new optimization to InstCombine. Like in other parts of the visitMul function I add a Shl through the IR builder and create a new BinaryOp which I return from visitMul. If I understand correctly the new BinaryOp returned from visitMul should replace the original Instruction in the Worklist. However, I end up in an infinite loop and the Instruction

Sorry for the delay Lee, I was out of town yesterday. In general it's better to send questions to the LLVMdev list... > hi. all i want to do now is make a new SetCondInst that i can replace > some old ones with, and it is turning out *impossible*. the first > parameter is the opcode, which is of class BinaryOps, which turns out to > be an enum i can't understand in

There is in fact a transform out there somewhere that reverses yours. define i64 @foo(i64 %a) { %b = shl i64 %a, 5 %c = add i64 %b, %a ret i64 %c } becomes define i64 @foo(i64 %a) { %c = mul i64 %a, 33 ret i64 %c } ~Craig On Wed, Sep 13, 2017 at 10:11 AM, Craig Topper <craig.topper at gmail.com> wrote: > Your code seems fine. InstCombine can infinite loop if some other

Hi Craig, thanks for digging into this. So InstCombine is the wrong place for fixing PR34474. Can you give me a hint where such an optimization should go into CodeGen? I am not really familiar with stuff that happens after the MidLevel. Cheers, Michael Am 13.09.2017 um 19:21 schrieb Craig Topper: > And that is less instructions. So from InstCombine's perspective the > multiply is

I am currently improving the D37896 to include the suggestions from Chad. However, running the lit checks for the x86 backend I observe some changes in the generated MC, e.g.: llvm/test/CodeGen/X86/lea-3.ll:13:10: error: expected string not found in input ; CHECK: leal ([[A0]],[[A0]],2), %eax ^ <stdin>:10:2: note: scanning from here orq %rdi, %rax ^ <stdin>:10:2:

This conversation has (partially) moved on to D37896 now, but if possible I was hoping that we could perform this in DAGCombiner and remove the various target specific combines that we still have. At least ARM/AARCH64 and X86 have cases that can hopefully be generalised and removed, but there will probably be a few legality/perf issues that will occur. Simon. > On 14 Sep 2017, at 06:23,

Hi Sanjay, thanks for enlighten me on terms of tests. I assume I have to run the test-suite benchmarks to check for regressions? Is there a guide to get the metrics from the benchmarks? Cheers, Michael BTW the beginner tag for bugs was really a good idea to get started with contributing to llvm. On Tue, Sep 19, 2017 at 3:58 PM +0200, "Sanjay Patel" <spatel at

On Feb 8, 2009, at 8:58 AM, Dan Gohman wrote: > Hi Chris, > > Would it be better to split add into multiple opcodes instead of using > SubclassData bits? No, I don't think so. The big difference here is that (like type) "opcode" never changes for an instruction once it is created. I expect that optimizations would want to play with these (e.g. convert them to

Folks, I have completed a final draft of the bytecode documentation. You can find it in llvm/docs/BytecodeFormat.html in CVS. Or, if you'd prefer to view online, you can find it here: http://llvm.x10sys.com/llvm/docs/BytecodeFormat.html I'm soliciting your feedback on this document. Please let me know if anything is awkward or just plain wrong. Thanks, Reid. -------------- next part

Hi Zsombor, Thanks for the patch! Unfortunately I can't apply it because the llvm API has moved from BinaryOperator::create to BinaryOperator::Create. Are you using svn head? Now on the x86_64 part. There has been very little work on porting vmkit on x86_64. If you're having compilation problems, I suppose it's in the garbage collector directory (GCMmap2). If you could make the

Hello, I'm trying to compile vmkit on a x86_64 linux box with gcc-4.1.2, but I'm running into troubles because of various problems with casts between pointers and integers. Is there anybody who succeeded in this task? Az I see, some of the problems can be fixed with an appropriate typedef/macro declaration, but in VMCore/JavaObject.cpp some lowlevel bitmanipulation is used, to mark

Sorry, the old title didn't make sense. > Hi, > > I have doubts on the following transformation in InstCombineAddSub.cpp. Is > it always safe to preserve NSW/NUW in this case? > > // If this is a 'B = x-(-A)', change to B = x+A. This preserves NSW/NUW. if (Value

Thanks for taking a look! On Tue, Oct 1, 2019 at 9:09 PM Philip Reames <listmail at philipreames.com> wrote: > On 9/27/19 1:40 PM, Roman Lebedev via llvm-dev wrote: > > In https://reviews.llvm.org/D68103 the InstCombine learned that shift-by-sext > > is simply a shift-by-zext. > > Just to make sure I'm following, the reasoning here is that the shift > amount must