similar to: [LLVMdev] Inline Asm Question

Jim Grosbach wrote: > To say that another way, is the assembler correctly diagnosing a previously > unnoticed problem in the project source code, or is the assembler not > behaving correctly according the the documented Intel assembly mnemonics? Where are the authoritative instruction set pages? If such a thing were readily available, why are there gaps in the current implementation? A

On Wed, Jul 10, 2013 at 2:08 PM, Ramkumar Ramachandra <artagnon at gmail.com> wrote: > Jim Grosbach wrote: >> To say that another way, is the assembler correctly diagnosing a previously >> unnoticed problem in the project source code, or is the assembler not >> behaving correctly according the the documented Intel assembly mnemonics? > > Where are the authoritative

On Jun 22, 2011, at 10:03 AM, Damjan Marion wrote: > > On Jun 22, 2011, at 6:15 PM, Jim Grosbach wrote: > >> >> On Jun 22, 2011, at 9:00 AM, Renato Golin wrote: >> >>> On 22 June 2011 16:50, Jim Grosbach <grosbach at apple.com> wrote: >>>>> This sounds like a dead end as newer binutils are GPLv3. >>>> >>>> Yeah,

On Jun 22, 2011, at 3:16 PM, Renato Golin wrote: > On 22 June 2011 11:49, Damjan Marion <damjan.marion at gmail.com> wrote: >> # /opt/llvm/bin/clang -S -ccc-host-triple arm-unknown-freebsd -mcpu=arm926ej-s -mfloat-abi=soft -v -o rrx.S rrx.c > > Even though you specified cpu as arm9, it's probably generating > generic ARM IR (use -emit-llvm -S and see), which defaults

On Jul 10, 2013, at 2:30 PM, Eric Christopher <echristo at gmail.com> wrote: > On Wed, Jul 10, 2013 at 2:08 PM, Ramkumar Ramachandra > <artagnon at gmail.com> wrote: >> Jim Grosbach wrote: >>> To say that another way, is the assembler correctly diagnosing a previously >>> unnoticed problem in the project source code, or is the assembler not >>>

On Jun 22, 2011, at 7:27 PM, Jim Grosbach wrote: >> I will try to find those pre-v3 patches. >> >> In meantime I wrote a patch which changes to old mnemonics for shift instructions. >> This fixes compiling on the freebsd. > > If this is really the only issue you're seeing, we may be lucky and your binutils already have support for lots of the changes necessary

On Jun 22, 2011, at 7:22 AM, Renato Golin wrote: > On 22 June 2011 14:33, Damjan Marion <damjan.marion at gmail.com> wrote: >> Problem is that in case when old binutils are used (in my case freebsd is using old one due to license upgrade to GPLv3) AS doesn't understand new mnemonics and fails. > > Indeed, this is new in ARM ARM v7. > > >> Can we change to

On Jun 22, 2011, at 6:15 PM, Jim Grosbach wrote: > > On Jun 22, 2011, at 9:00 AM, Renato Golin wrote: > >> On 22 June 2011 16:50, Jim Grosbach <grosbach at apple.com> wrote: >>>> This sounds like a dead end as newer binutils are GPLv3. >>> >>> Yeah, that's definitely a very real concern and a big motivation to get the MC based asm parser

I'm porting the musl C library to ARM Thumb. It looks like inline asm is failing in some cases. Here's one: The lseek system call looks like this: ... off_t result; return syscall(SYS__llseek, fd, offset>>32, offset, &result, whence) ? -1 : result; ... Which eventually goes through this macro: static inline long __syscall5(long n, long a, long b, long c,

On Jun 22, 2011, at 9:00 AM, Renato Golin wrote: > On 22 June 2011 16:50, Jim Grosbach <grosbach at apple.com> wrote: >>> This sounds like a dead end as newer binutils are GPLv3. >> >> Yeah, that's definitely a very real concern and a big motivation to get the MC based asm parser whipped into usable shape. We're much more in control of our own destiny then.

Hi , I am trying to enable link time optimization for my projects. Few of them has inline assembly which works perfectly with clang/llvm but on enabling LTO I get following error LLVM ERROR: Error parsing inline asm <inline asm>:103:2 : error 0: unknown use of instruction mnemonic without a size suffix <inline asm>:104:16 : error 0: invalid operand for instruction <inline

On Jun 22, 2011, at 5:29 PM, Jim Grosbach wrote: > > On Jun 22, 2011, at 7:22 AM, Renato Golin wrote: > >> On 22 June 2011 14:33, Damjan Marion <damjan.marion at gmail.com> wrote: >>> Problem is that in case when old binutils are used (in my case freebsd is using old one due to license upgrade to GPLv3) AS doesn't understand new mnemonics and fails. >>

Hi LLVM hackers, when switching one of our projects to LLVM we discovered some strange behavior. We tracked the issue down to the following test case: int main() { double v = 0.84711; int r; __asm__("fistl %0": "=m"(r) : "t"(v)); return r; } The (relevant) clang generated asm looks like this: fldt 0.84711 ## InlineAsm Start fistl -4(%ebp) ## InlineAsm End

Hello all, I would like to assign some bits in the instructions, based on the order of mnemonics that appear in a special order. I can do it in TableGen itself, but it will not be well maintainable based on the things I want to accomplish. Therefor, I would like to do it in the c++ file which is waaay easier (at least in the concept!!). Imagine I have this in my base class in TableGen:

On Jun 22, 2011, at 8:39 AM, Damjan Marion wrote: > > On Jun 22, 2011, at 5:29 PM, Jim Grosbach wrote: > >> >> On Jun 22, 2011, at 7:22 AM, Renato Golin wrote: >> >>> On 22 June 2011 14:33, Damjan Marion <damjan.marion at gmail.com> wrote: >>>> Problem is that in case when old binutils are used (in my case freebsd is using old one due to

I was under the impression his answer was correct from your reply, no? On Oct 17, 2016 17:45, "Alex Bradley via llvm-dev" <llvm-dev at lists.llvm.org> wrote: > Gentle Ping !! > > I would appreciate any help on this. I want to generate following as > described by Krzysztof : > > %v1 = load i32, i32* %a > %v2 = load i32, i32* %b > %v3 = add i32 %v1, %v2 >

Hello all, I am at the adding Instruction Set stage of adding new target support into LLVM. There is a single instruction op mnemonic with multiple operand forms. For example: Add R1, R2 & Add @R1, R2. I found that there is similar case in x86 instruction set, such like ADD reg, reg & ADD mem, reg. However, the solution of x86 is adding suffix of instruction and translating instruction op

Hello, I get this error when compiling this code with llvm-gcc: error: unsupported inline asm: input constraint with a matching output constraint of incompatible type! #include <stdio.h> #include <stdlib.h> #include <sys/time.h> #include <sys/types.h> #include <unistd.h> int main(void) {

Hi, I am using llvm to convert some C++ code to C. However the C++ code has couple of lines of assembly that is supposed to be inlined. I am using __asm__ directive. However the resulting C code has syntax errors: main.c: In function ‘_Z23atomic_exchange_and_addPii’: main.c:397: error: expected ‘:’ or ‘)’ before string constant main.c: In function ‘_Z16atomic_incrementPi’: main.c:421: error:

On 22 June 2011 14:33, Damjan Marion <damjan.marion at gmail.com> wrote: > Problem is that in case when old binutils are used (in my case freebsd is using old one due to license upgrade to GPLv3) AS doesn't understand new mnemonics and fails. Indeed, this is new in ARM ARM v7. > Can we change to old mnemonic at least when ARMv4 and ARMv5 code is generated? We definitely should.