similar to: [LLVMdev] jump table x constant pool

In the ARM backend, functions (and other 32 bit constants) are placed in a pool and loaded when needed. A problem with this is that ".weak" directives must be printed in the pool. This is not supported in the standard printer, so I think that I have found the first use for MachineConstantPoolValue :-) Creating the constant is easy, but I have two problems: 1) what are the methods

On Jun 8, 2009, at 2:42 PM, robert muth wrote: > On Sun, Jun 7, 2009 at 11:53 PM, Evan Cheng <evan.cheng at apple.com> > wrote: >> >> On Jun 7, 2009, at 6:59 AM, robert muth wrote: >> >>> On Sat, Jun 6, 2009 at 4:51 PM, Evan Cheng<evan.cheng at apple.com> >>> wrote: >>>> +cl::opt<std::string>

Hi list: I have been trying to get my feet wet with the ARM backend. As a warmup exercise I wanted to be able to move jumptables especially large ones out of the code section. Currently the idiom for jump tables loooks like this // .set PCRELV0, (.LJTI9_0_0-(.LPCRELL0+8)) // .LPCRELL0: // add r3, pc, #PCRELV0 // ldr pc, [r3, +r0, lsl #2] // .LJTI9_0_0: //

On Sun, Jun 7, 2009 at 11:53 PM, Evan Cheng <evan.cheng at apple.com> wrote: > > On Jun 7, 2009, at 6:59 AM, robert muth wrote: > >> On Sat, Jun 6, 2009 at 4:51 PM, Evan Cheng<evan.cheng at apple.com> >> wrote: >>> +cl::opt<std::string> FlagJumpTableSection("jumptable-section", >>> +                                          

On Thu, Jun 25, 2009 at 6:17 PM, Bob Wilson <bob.wilson at apple.com> wrote: > Hi Robert, > Evan asked me to review this patch, and I have some questions about it. I > apologize for not following the discussion earlier and for hitting you with > questions after you've already gone through several revisions. > > LLVM provides some default behavior for handling jump

On Jul 2, 2009, at 10:48 AM, robert muth wrote: > I spend over a day trying to follow your suggestion. In the end I > was not successful. Here is what Iearned: > > After setting > > ARMJITInfo::hasCustomJumpTables -> true > setOperationAction for ISD::BR_JT -> Expand > > I needed to add a "brind" definition to ARMInstrInfo.td > I picked

Is there any way to add an optional flag edge to a BRIND node? I In the ARM backend I lower returns directly to BRINDs, so I need to add an edge connecting the BRIND and the CopyToReg that sets the return value. The other option is to create an ARM specific node that is identical to BRIND except for having a flag edge. Thanks, Rafael

Evan: Sorry for the late follow up, I was out of town last week. Enclosed please find the updated patch including all your suggestions and a dejagnus test. Robert On Thu, Jun 11, 2009 at 2:27 PM, Evan Cheng <evan.cheng at apple.com> wrote: > > On Jun 8, 2009, at 2:42 PM, robert muth wrote: > > > On Sun, Jun 7, 2009 at 11:53 PM, Evan Cheng <evan.cheng at apple.com>

On Tue, Jul 14, 2009 at 6:48 PM, Bob Wilson <bob.wilson at apple.com> wrote: > > On Jul 2, 2009, at 10:48 AM, robert muth wrote: > > I spend over a day trying to follow your suggestion. In the end I was not > successful. Here is what Iearned: > > After setting > > ARMJITInfo::hasCustomJumpTables -> true > setOperationAction for ISD::BR_JT -> Expand >

On Wed, 6 Dec 2006, [UTF-8] Rafael Esp?ndola wrote: > In the ARM backend, functions (and other 32 bit constants) are placed > in a pool and loaded when needed. Has this approach been replaced with your later constant pool patch? -Chris > A problem with this is that ".weak" directives must be printed in the > pool. This is not supported in the standard printer, so I think

> > Why it is named RETFLAG? > > Historical reason. Originally we didn't have nodes that could > *optionally* have an input flag. A better design, e.g. on PPC would be to > have a PPCISD::RET node, which takes an optional input flag, and always > lower RET to it. I See. I will try to always lower to "(mov)*;bx lr" on ARM. > Flag in the SelectionDAG stuff is

I have changed the way in which the ARM backend generates a function return. Instead of expanding a RET to a CopyToReg;RETFLAG, it now expands into a CopyToReg;BRIND. I haven't commit it yet, but the patch is attached. In my opinion the resulting code is easier to understand, but I have some questions: Why all backends use RETFLAG? Why it is named RETFLAG? Why the Copy that places the

On Wed, 31 May 2006, [UTF-8] Rafael Esp?ndola wrote: >> We don't want the copy and shift to wander apart from each other (e.g. we >> don't want another shift to get scheduled in between them), so we flag >> them together. In practice, these copies usually get coallesced away. > In the second case shl explicitly uses CL. Shouldn't the register > allocator be

Hi: This is my first patch submission. Hopefully, this is the proper the protocol. Attached is a patch for the llc ARM backend: Added mechanism to generate switch table in a data section rather than having it interleaved with the code. This is controlled by command line flags and off by default. Also, tried to document and improve the code where I modified it. Robert -------------- next part

On 5/31/06, Chris Lattner <sabre at nondot.org> wrote: > On Wed, 31 May 2006, [UTF-8] Rafael Esp?ndola wrote: > >> We don't want the copy and shift to wander apart from each other (e.g. we > >> don't want another shift to get scheduled in between them), so we flag > >> them together. In practice, these copies usually get coallesced away. > > In

On Tue, 30 May 2006, [UTF-8] Rafael Esp?ndola wrote: > I have changed the way in which the ARM backend generates a function > return. Instead of expanding a RET to a CopyToReg;RETFLAG, it now > expands into a CopyToReg;BRIND. I haven't commit it yet, but the patch > is attached. Ok, I haven't looked at the code, but you're free to do whatever make sense. > In my

Hi, I encountered an error while trying to use the indirectbr instruction with Alpha backend (current build). Here's part of the code sequence that I tried to compile: bb1: %1 = load i32* %i, align 4 %2 = add nsw i32 %1, 1 store i32 %2, i32* %i, align 4 indirectbr i8* blockaddress(@main, %bb1), [ label %bb1 ] br label %return This compiles correctly when I use the X86 or PPC

On Jul 23, 2009, at 12:10 PM, robert muth wrote: > Bob: > > Thanks for cleaning this up. I like the new patch much better than > the old one. > Teaching the (abstract) ConstantValue class about jumptable indices > is a little > bit ugly but I do not see any better solution without massive > refactoring. > I have added TODOs here and elsewhere and plan to address

On Thu, 2013-08-22 at 11:29 +0400, Alexey Samsonov wrote: > Ah, I've replied in a different thread already. What Dmitri says - If > you're interesting in only building the Clang on x32 host, you may avoid > checking out compiler-rt repo for now. > > compiler-rt does make a convenient compiler test though.. :) fatal error: error in backend: Cannot select: 0x30ccf38: ch =

Hi Robert, Evan asked me to review this patch, and I have some questions about it. I apologize for not following the discussion earlier and for hitting you with questions after you've already gone through several revisions. LLVM provides some default behavior for handling jump tables, with the tables emitted separately from the code that uses them. The ARM backend provides its