similar to: [LLVMdev] emitting jump tables

Displaying 20 results from an estimated 500 matches similar to: "[LLVMdev] emitting jump tables"

2010 Jan 28
2
[LLVMdev] llc generated machine assembly code for NASM
Hello, I am new here. This is my first post. I spent about three days on trying out LLVM by developing a front-end which is able to generate LLVM IR for a subset of C language. I have not applied any optimization pass yet. On linux, it can go all the way through with the system native assemlber and linker to generate executables. And it runs. I ran into problems on Windows since the generated
2009 Apr 20
0
[LLVMdev] A few questions from a newbie
On 20/04/2009, at 07.35, Peter Bacon wrote: > Hello, I am learning to write a new backend for LLVM and have a few > simple questions. Hi Peter, I am a newbie too, but I have recently dealt with the same issues. > 1) What are the differences between 'constant' and 'targetconstant', > 'globaladdress' and 'targetglobaladdress'? It is not clear from
2009 Apr 20
2
[LLVMdev] A few questions from a newbie
Hi Jacob, thank you for your reply. Your suggestion works! But instead of using the Pat<>, I am using def MOVE_ADDR : MYInst<(outs Int32Regs:$dst), (ins i32mem:$a), "move $dst, $a;", [(set Int32Regs:$dst, (Wrapper tglobaladdr:$a))]>; I don't quite understand what the semantics of Pat in general. Could you please explain what
2011 Mar 18
2
[LLVMdev] Text or Data symbol
I am again calling for help from LLVM developers ;) For my DSP backend, at the lowering stage and also at the AsmPrinter stage, I need to know if a GlobalAddress is a code or a data address. So I tried at the lowering stage to use: GlobalAddressSDNode *GSDN = cast<GlobalAddressSDNode>(Op); const GlobalValue *GV = GSDN->getGlobal(); GV->hasSection() and GV->getSection() But the
2011 Mar 21
0
[LLVMdev] Text or Data symbol
I reply to myself... I didn't go in the right direction in my previous email. There is an easy way to tell if a GlobalValue corresponds to data or code: const GlobalValue *GV; if(Function::classof(GV)) ... // process the global value as a function else ... // process the global value as data Damien On Fri, Mar 18, 2011 at 3:16 PM, Damien Vincent <damien.llvm at
2011 Mar 21
1
[LLVMdev] Text or Data symbol
On 3/21/11 2:00 PM, Damien Vincent wrote: > I reply to myself... I didn't go in the right direction in my previous > email. > > There is an easy way to tell if a GlobalValue corresponds to data or code: > const GlobalValue *GV; > if(Function::classof(GV)) > ... // process the global value as a function > else > ... // process the global value as data > >
2007 Jun 29
0
[LLVMdev] How to call native functions from bytecode run in JIT?
Hi Jan, If I recall correctly, in Linux you get the message: PPCJITInfo.cpp:382: failed assertion `ResultPtr >= -(1 << 23) && ResultPtr < (1 << 23) && "Relocation out of range!"' Right? But on OS X you don't have this messsage? Here's a temporary fix until I find time to investigate on this: In function PPCISelLowering::LowerCALL,
2012 Mar 16
0
[LLVMdev] Lowering formal pointer arguments
I had the same issue as both of you when I was implementing this for my backend. In LowerCall you can get the callee prototype info when the Callee SDValue is a GlobalAddressSDNode doing cast<Function>(G->getGlobal()) (where G is GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)), but this won't work when it is a ExternalSymbolSDNode, for that case i had to add
2006 Nov 15
2
[LLVMdev] LowerCALL (TargetLowering)
Hi, I am trying to write a LowerCALL() function for my (custom) target ISA. All I need to do is map a CALL instruction directly onto an SDNode that takes an equal number of arguments (very much alike intrinsics, except that these are custom to my target.) I do not need to implement any call sequences, stack frames etc. I get the following assertion failure: llc: LegalizeDAG.cpp:834:
2006 Nov 15
0
[LLVMdev] LowerCALL (TargetLowering)
Hi Nickhil, The Legalizer expects lower'd call is the node that produce the same number of values as the non-lowered node. That's what the assertion is checking. Take a look at the LowerCall routine for any other targets. You will see that in the non-void function case, it returns a MERGE_VALUES, i.e. all the results merged along with the chain. Cheers, Evan On Nov 15, 2006, at
2013 Mar 01
0
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU
Ok, as I said, the most precise way to figure out what's wrong is to emit LLVM IR first (use clang -emit-llvm ...) and check out how it differs from working examples, for instance, nvptx regression tests. ----- Original message ----- > I'm building this with llvm-c, and accessing these intrinsics via calling > the intrinsic as if it were a function. > > class F_SREG<string
2009 Apr 28
1
[LLVMdev] AddressSpace of a GlobalAddress
Every GlobalAddress has a GlobalValue, Every GlobalValue is a PointerType, Every PointerType has an AddressSpace. So is it ok to add a method getAddressSpace in GlobalAddressSDNode class itself? Currently we have to do GSDN->getGlobal()->getType()->getAddressSpace(). - Sanjiv
2007 Jun 30
1
[LLVMdev] How to call native functions from bytecode run in JIT?
Hi, > If I recall correctly, in Linux you get the message: > > PPCJITInfo.cpp:382: failed assertion `ResultPtr >= -(1 << 23) && > ResultPtr < (1 << 23) && "Relocation out of range!"' > > > Right? But on OS X you don't have this messsage? Not exactly. There seem to be two problems. Your patch fixes one of them: in OS X I
2013 Mar 01
0
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU
Hi Timothy, I'm not sure what you mean by this working for other intrinsics, but in this case, I think you want the intrinsic name llvm.nvvm.read.ptx.sreg.tid.x. For me, this looks like: %x = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() Pete On Fri, Mar 1, 2013 at 11:51 AM, Timothy Baldridge <tbaldridge at gmail.com> wrote: > I'm building this with llvm-c, and accessing these
2006 Nov 15
1
[LLVMdev] LowerCALL (TargetLowering)
Hi Evan, On Wed, Nov 15, 2006 at 10:17 -0800, Evan Cheng wrote: > Hi Nickhil, > > The Legalizer expects lower'd call is the node that produce the same > number of values as the non-lowered node. That's what the assertion > is checking. > > Take a look at the LowerCall routine for any other targets. You will > see that in the non-void function case, it
2013 Mar 01
1
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU
The identifier INT_PTX_SREG_TID_X is the name of an instruction as the back-end sees it, and has very little to do with the name you should use in your IR. Your best bet is to look at the include/llvm/IR/IntrinsicsNVVM.td file and see the definitions for each intrinsic. Then, the name mapping is just: int_foo_bar -> llvm.foo.bar() int_ prefix becomes llvm., and all underscores turn into
2012 Dec 17
0
[LLVMdev] Query Regarding instruction ordering of passive nodes
Hi All, I'm trying to compile the attached code(gdb11531.c) with latest clang with -O0 on ARM. Clang seems to be reordering the instructions in case of constant nodes(for ARM) even when O0 is specified resulting in few wrong information when debugging through GDB. I had few queries,would be great if someone could clarify the same - In the given assembly code, the instructions where constant
2008 Feb 15
1
[LLVMdev] LLVM2.2 x64 JIT trouble on VStudio build
Hey Evan, At the point of the instructions you suggested I step through, X86ISelLowering has this state: - this 0x00000000005fe728 {VarArgsFrameIndex=-842150451 RegSaveFrameIndex=-842150451 VarArgsGPOffset=3452816845 ...} llvm::X86TargetLowering * const + llvm::TargetLowering {TM={...} TD=0x00000000008edac0
2006 Nov 03
4
[LLVMdev] is createCFGSimplificationPass unused?
It looks like createCFGSimplificationPass was disabled on 2006/09/04. This causes some problems for architectures that use conditional moves to implement select (alpha and ARM). For example, on 2006/09/03 a "if (a) return 0; else return 1;" compiled to ---------------------------------------- zapnot $17,15,$1 zapnot $16,15,$2 bis $31,$31,$0 cmpeq $2,$1,$1
2007 Sep 04
0
[LLVMdev] How to put a pass for last?
Hello guys, I'm writing a pass that must check every machine instruction that will go to assembly. I've put my pass registration just before the "addAsmEmmiter" line in LLVMTargetMachine.cpp But, iterating trought machine functions and basic blocks inside the functions, there are still machine instructions that I cant reach. This is the beginnig of the asm output of my example