similar to: [LLVMdev] Recalculating live intervals

On Sun, 6 Aug 2006, Anton Vayvod wrote: > I'm developing a register allocator that works iteratively. It spills some > virtual registers on each iteration until all the rest have physical ones > assigned. Take a look at the linear scan allocator. It is also iterative: it uses the spiller interface to insert spill code, which creates (unspillable) intervals for the spill code it

On 8/7/06, Chris Lattner <sabre at nondot.org> wrote: > > On Sun, 6 Aug 2006, Anton Vayvod wrote: > > I'm developing a register allocator that works iteratively. It spills > some > > virtual registers on each iteration until all the rest have physical > ones > > assigned. > > Take a look at the linear scan allocator. It is also iterative: it uses >

I'm not sure about one thing: you assign stack slot to each new register you replace the spilled one with. And then you need to allocate physical registers to them. Is it possible to assign physical register to the virtual one which has a stack slot already? On 8/21/06, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: > > > > So what addIntervalsToSpills

Well, someone correct me if am wrong, but, you still have to allocate physical registers to them, because their values must be reloaded before been used. But after you spill a register, you break its live ranges, so, each use of that register can be loaded into a different physical. In my register allocator, after I spill reg_v: For each use of reg_v: create a new reg_v' replace reg_v

So what addIntervalsToSpills returns are new intervals to allocate with infinite weights, right? And I need not to allocate the old interval. Should hasStackSlot return true on its register then? On 8/21/06, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: > > > Well, someone correct me if am wrong, but, you still have to allocate > physical registers to them,

On Monday 06 August 2007 12:15, Anton Vayvod wrote: > Spill intervals must be precolored because they can't be spilled once more. > They are the shortest intervals precisely over each def/use of the original > interval. That is why they also have their weights set to #INF. Yes, that's true. But I wonder if we shouldn't be smarter about which register we pick to color it.

Can someone explain the theory behind the spillers in VirtRegMap.cpp? It seems as though the spillers do triple duty: - Insert load/store operations and/or fold instructions as necessary to carry out spills - Rewrite the spilled virtual registers to use machine registers (mapping given by the caller in the VRM). - Rewrite machine code to change virtual registers to physical registers

On 8/7/07, David Greene <dag at cray.com> wrote: > > On Monday 06 August 2007 12:15, Anton Vayvod wrote: > > > Spill intervals must be precolored because they can't be spilled once > more. > > They are the shortest intervals precisely over each def/use of the > original > > interval. That is why they also have their weights set to #INF. > > Yes,

Fernando Magno Quintao Pereira wrote: >> I'm not sure about one thing: you assign stack slot to each new register you >> replace the spilled one with. And then you need to allocate physical >> registers to them. Is it possible to assign physical register to the virtual >> one which has a stack slot already? >> > > Yes. The stack slot is the place where the

> So what addIntervalsToSpills returns are new intervals to allocate with > infinite weights, right? > And I need not to allocate the old interval. Should hasStackSlot return true > on its register then? > I am not very sure about addIntervalsToSpill, but, for all the registers created to replace a spilled registers, they must have a stack slot assigned to them. I am sending you my

See http://llvm.org/bugs/show_bug.cgi?id=4668 and http://llvm.org/bugs/show_bug.cgi?id=5010. The basic description of the issue (from http://llvm.org/bugs/show_bug.cgi?id=4668#c5): "The fundamental problem is we can't spill a register once it's fixed to a physical register." >From discussion on IRC: [17:14] <_sabre_> efriedma: sounds like a RA bug in linscan [17:14]

> I'm not sure about one thing: you assign stack slot to each new register you > replace the spilled one with. And then you need to allocate physical > registers to them. Is it possible to assign physical register to the virtual > one which has a stack slot already? > Yes. The stack slot is the place where the value will be stored in memory, but, when that value is effectively

On Tuesday 07 August 2007 05:00, Anton Vayvod wrote: > > Yes, that's true. But I wonder if we shouldn't be smarter about which > > register we pick to color it. In Bill W's implementation, it was > > essentially random. What was your solution to this? > > I allocated spill intervals at the beginning of each iteration so all the > rest intervals (except of

Ok, I've found that marking tiny live intervals as not spillable inside VirtRegAuxInfo::CalculateWeightAndHint is not playing nicely with very constrained regclasses, in my case a regclass composed of only one register. As a workaround, instead of marking them as not spillable, I've marked them with a very high spill cost and the regalloc is able to compile the function with good code

On Jan 9, 2013, at 10:46 AM, Borja Ferrer <borja.ferav at gmail.com> wrote: > Ok, I've found that marking tiny live intervals as not spillable inside VirtRegAuxInfo::CalculateWeightAndHint is not playing nicely with very constrained regclasses, in my case a regclass composed of only one register. > As a workaround, instead of marking them as not spillable, I've marked them

On Aug 21, 2010, at 5:27 PM, Eli Friedman wrote: > See http://llvm.org/bugs/show_bug.cgi?id=4668 and > http://llvm.org/bugs/show_bug.cgi?id=5010. The basic description of > the issue (from http://llvm.org/bugs/show_bug.cgi?id=4668#c5): "The > fundamental problem is we can't spill a register once it's fixed to a > physical register." > >> From discussion

Chris Lattner wrote: >I think that we should switch to C constants in this case. Can you try >#include <math.h> and use HUGE_VAL instead? > It works: [finna at coplin11 ~/test]$ cat tst.cpp #include <limits> #include <iostream> #include <math.h> int main() { std::cerr << std::numeric_limits<float>::infinity() << "\n"; std::cerr

Chris Lattner wrote: >Could you try compiling and running this program: > >--- >#include <limits> >#include <iostream> >int main() { > std::cerr << std::numeric_limits<float>::infinity() << "\n"; >} >--- > > Sure thing. It prints "0". Calling that inifinity is somewhat of a stretch, isn't it ? What on earth

Hi All, I finally had a chance to get back to my pbqp trials, now using the 3.0 release. I still hit the same assert : "Attempting to spill already spilled value." This is triggered because in RegAllocPBQP::mapPBQPToRegAlloc, a vreg node is either : - a physical register (problem.isPRegOption(vreg, alloc)), - or a spill (problem.isSpillOption(vreg, alloc)) The problem is that pass

Hi, David. Spill intervals must be precolored because they can't be spilled once more. They are the shortest intervals precisely over each def/use of the original interval. That is why they also have their weights set to #INF. Imagine that on a second iteration allocation algorithm figures out that some spilled interval can't be assigned a physical register. Allocator can't spill it