similar to: [LLVMdev] Auto-vectorization in GCC 4.0

Displaying 20 results from an estimated 800 matches similar to: "[LLVMdev] Auto-vectorization in GCC 4.0"

2006 Jul 31
0
[LLVMdev] Auto-vectorization in GCC 4.0
llvmgcc4 emits LLVM byte code before executing GCC optimizations, so one can say that llvmgcc4 disables all GCC optimizations. On Jul 31, 2006, at 11:01 AM, Zhiru Zhang wrote: > Hi, > I am trying to turn on the new GCC auto-vectorization feature > within llvmgcc4. Below is the command I used, but nothing was > vectorized. Does it mean that llvmgcc4 has disabled this >
2006 Jul 31
2
[LLVMdev] Auto-vectorization in GCC 4.0
Does llvmgcc4 convert the high-level AST to LLVM (like llvmgcc3x) or does it go from GIMPL to LLVM? If the latter, would it be possible to allow some TreeSSA optimizations before emitting LLVM? --Vikram http://www.cs.uiuc.edu/~vadve http://llvm.cs.uiuc.edu/ On Jul 31, 2006, at 1:10 PM, Devang Patel wrote: > llvmgcc4 emits LLVM byte code before executing GCC optimizations, > so one
2006 Jul 31
0
[LLVMdev] Auto-vectorization in GCC 4.0
On Jul 31, 2006, at 11:14 AM, Vikram Adve wrote: > Does llvmgcc4 convert the high-level AST to LLVM (like llvmgcc3x) > or does it go from GIMPL to LLVM? If the latter, would it be > possible to allow some TreeSSA optimizations before emitting LLVM? llvmgcc4 intercepts high-level GCC trees to GIMPLE tree transformation routines to get trees that are suitable for LLVM byte code.
2006 Jul 31
1
[LLVMdev] Auto-vectorization in GCC 4.0
On Mon, 31 Jul 2006, Devang Patel wrote: > On Jul 31, 2006, at 11:14 AM, Vikram Adve wrote: >> Does llvmgcc4 convert the high-level AST to LLVM (like llvmgcc3x) or does >> it go from GIMPL to LLVM? If the latter, would it be possible to allow >> some TreeSSA optimizations before emitting LLVM? > llvmgcc4 intercepts high-level GCC trees to GIMPLE tree transformation
2006 Apr 08
2
speex cvs: 'EncState' has no member named 'frame'
Trying to build today's svn on fc5, gcc-4.1.0,amd64: gcc -DHAVE_CONFIG_H -I. -I. -I.. -I../include -I../include -I.. -I/usr/include -O2 -fPIC -funswitch-loops -ftree-loop-linear -march=k8 -ftree-vectorize -pipe -mfpmath=sse -frename-registers -O3 -msse -MT nb_celp.lo -MD -MP -MF .deps/nb_celp.Tpo -c nb_celp.c -fPIC -DPIC -o .libs/nb_celp.o nb_celp.c: In function 'nb_encode':
2006 Feb 25
2
gcc-4.1: svn 10958 fix point build fails
Building svn 10958 on amd64, gcc-4.1: gcc -DHAVE_CONFIG_H -I. -I. -I.. -I../include -I../include -I.. -I/usr/include -O2 -fPIC -funswitch-loops -fvisibility-inlines-hidden -march=k8 -ftree-vectorize -pipe -mfpmath=sse -O3 -msse -MT filters.lo -MD -MP -MF .deps/filters.Tpo -c filters.c -fPIC -DPIC -o .libs/filters.o cc1: warning: command line option "-fvisibility-inlines-hidden" is
2007 Apr 25
2
[LLVMdev] ModulePass that requires FunctionPass
Hi Devang, You recently mentioned that the pass manager now allows a ModulePass to require a FunctionPass. I just tried it but ran into errors. Could you please take a look to see if I did anything wrong? Thanks! Basically I changed the HelloWorld sample pass to be a ModulePass and tried to use the LoopInfo pass inside the runOnModule routine. See below for the source code and error messages.
2006 May 09
0
[LLVMdev] New llvmgcc4 snapshot
Hi, i tried compiling llvmgcc4 on x86_64-linux. The two changes i needed to apply to llvm and llvmgcc4 are attached. Those two patches tell llvmgcc4 to use the x86 code-generator for x86_64 and give x86_64-* targets a score of 10 for the x86 backend when trying to find appropriate backends. Now i'm getting stuck during the compile when an assertion is triggered: make[3]: Leaving
2011 Apr 09
0
[LLVMdev] dragonegg/llvm-gfortran/gfortran benchmarks
On Sat, Apr 09, 2011 at 08:56:49AM -0600, Marcus G. Daniels wrote: > On 4/9/2011 6:09 AM, Duncan Sands wrote: > > Hi Jack, thanks for the numbers. Any chance of analysing why gcc does better on > > those where it does much better than dragonegg? > > > > Ciao, Duncan. > Also, does -fplugin-arg-dragonegg-enable-gcc-optzns get Dragonegg to > match GCC performance
2006 May 08
6
[LLVMdev] New llvmgcc4 snapshot
Hi All, There's a new snapshot of llvmgcc4 available here: http://nondot.org/sabre/2006-05-08-llvm-gcc-4.tar.gz This release includes the various portability fixes contributed on llvmdev, includes fixes to build with mainline CVS (and, thus, *requires* mainline CVS), and includes various other bug fixes. If you're interested, please try it out. Thanks, -Chris --
2008 Nov 01
0
[LLVMdev] llvm-gcc-4.2 CC1_SPECS
On Fri, Oct 31, 2008 at 10:38:50AM -0700, Mike Stump wrote: > On Oct 31, 2008, at 9:40 AM, Jack Howarth wrote: >> However in current llvm svn, when I compile code with llvm-gfortran, I >> get these warning >> flags passed by default so that I get bogus warnings of... >> >> f951: warning: command line option "-Wformat" is valid for C/C++/ >>
2015 Jun 17
2
[LLVMdev] RFC - Stop ignoring -fprofile-generate and -fprofile-use
The flags -fprofile-generate and -fprofile-use are currently ignored for GCC compatibility. I would like to enable them and give them similar semantics to GCC. These flags are baked pretty deeply into our build environment, so supporting them at the driver level will make our lives a lot simpler. >From https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html:
2006 May 13
0
[LLVMdev] Re: New llvmgcc4 snapshot
Chris Lattner wrote: > > Hi All, > > There's a new snapshot of llvmgcc4 available here: > > http://nondot.org/sabre/2006-05-08-llvm-gcc-4.tar.gz Chris, is there any chance that the new frontend will support dynamic loading of backends? I.e: llvm-g++ -load my_backend.so -march=my_arch a.c ? Thanks, Volodya
2011 Oct 13
1
[LLVMdev] dragonegg svn benchmarks
On Thu, Oct 13, 2011 at 02:37:54PM +0200, Duncan Sands wrote: > Hi Jack, > >> IMHO, the more important thing is to fish out the remaining regressions >> in the llvm vectorization code by defaulting -fplugin-arg-dragonegg-enable-gcc-optzns >> on in dragonegg svn once llvm 3.0 has branched. Hopefully this will get us wider >> testing of the llvm vectorization
2013 Oct 14
0
[LLVMdev] Vectorization of pointer PHI nodes
On 14 October 2013 18:15, Nadav Rotem <nrotem at apple.com> wrote: > 1. We have 4 stores to consecutive locations, but the last element is the > constant zero, and not an additional SUB. At the moment we don’t have > support for idempotence operations, but this is something that we should > add. > The fourth write is not necessary for GCC to vectorize it (nor was in the
2006 May 02
1
[LLVMdev] Re: Patches and some potential bugs
On Sat, 29 Apr 2006, Domagoj Babic wrote: > These should add xIDs for several passes. Please let me know if there're > any problems with the code. I'm a very novice C++ and LLVM programmer, > so please bear with me. The patches look great, applied: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20060501/034450.html
2006 Jun 02
0
[LLVMdev] Compiling natively vsftp with LLVM
On Fri, 2 Jun 2006, Nai Xia wrote: > And the command lines: > > llvm-gcc -c -o main.o main.c > gcc -o foo.o foo.c > ar rcs libfoo.a foo.o > llvm-gcc -Wl,-native main.o -L. -lfoo > > It's *OK* > > Thanks in advance for solving my problem. :) > And I personally think it may possiblely puzzle other users, > maybe it deserves its place in FAQ or in man page for
2007 Feb 05
1
[LLVMdev] lli problem in llvm
Hi Reid, I am using llvmgcc4-1.9 for x86 linux, and I got my version of LLVM from CVS repository. Are these versions not compatible? Thanks, Joy. -- Joy W. Kamunyori Graduate Student - Computer Science Dept. University of Virginia jkamunyori at cs.virginia.edu "Life must be understood backwards; but... it must be lived forward." Soren Kierkegaard
2007 Jan 22
0
[LLVMdev] more llvmgcc build issues.
Hi, Last night's attempt to build llvmgcc4 with svn head ends in this . This is on an x86 FC5 environment. /home/ramana/llvm/llvmgccfrontend/llvmgcc4-source/build-llvmgcc/gcc/xgcc -B/home/ramana/llvm/llvmgccfrontend/llvmgcc4-source/build-llvmgcc/gcc/ -B/home/ramana/llvm/install-llvm/i686-pc-linux-gnu/bin/ -B/home/ramana/llvm/install-llvm/i686-pc-linux-gnu/lib/ -isystem
2004 Oct 20
0
[LLVMdev] Re: LLVM Compiler Infrastructure Tutorial
Yeah. We need to have more extra fields in the instruction. Fo example, during high-level synthesis, we must schedule an instruction to a certain control step (or cycle), and bind it to be execute on a certain functional unit, etc. Besides the in-memory exchange of the information, we also want on-disk exchange. That introduces the write-out/parse-in problem. Thanks ----- Original Message -----