similar to: [LLVMdev] Spilling register and frame indices

On Tue, 23 May 2006, Vladimir Prus wrote: > right now, LLVM does register spilling by: > > 1. Creating stack object > 2. Passing index of that stack object to MRegisterInfo::storeRegToStackSlot > 3. At later stage, frame indices are replaced by calling to > MRegisterInfo::eliminateFrameIndex. > > This works for me, but there's slight problem. The target does not have

Chris Lattner wrote: >> and then have 'virtual_register' allocated on next iteration of register >> allocator? > > This is one approach. Another approach is to have to spiller scavange > registers, which is the subject of this enhancement request: > http://llvm.org/PR768 Can you given some references for this "scavange" thing? Google and ResearchIndex

On Jul 11, 2007, at 11:39 AM, David Greene wrote: > On Wednesday 11 July 2007 12:41, Tanya M. Lattner wrote: > >> I think the coalescer should be flexible enough to be run >> independent of >> the register allocator. For example, you may want to expose the >> copies >> induced by transforming out of SSA to the scheduler. If the >> scheduler is

On Wednesday 11 July 2007 15:07, Christopher Lamb wrote: > Could it be possible for there to be a harness type interface that > would allow coalescers that support both modes to be hooked into the > pass registration, and those that depend on the allocator not be > registered as passes? I have a patch for this kind of thing attached. Please take a look and let me know if it looks

On Wed, Apr 21, 2004 at 11:01:48AM +0200, Finn S Andersen wrote: > For some of the benchmarks the linear scan regalloc > works. When it does, results are in the x1.0 - 1.5 > range. Unfortunately, the linear scan allocator breaks > on most of my code. Is there a chance you can try cvs? I would be interested to get a simplified test case where the allocator breaks. A lot of

Dear LLVMers, we here in the UCLA compiler's lab have an implementation of a very cool register allocator in LLVM. It finds an optimal register assignment for the x86 machine, via live range splitting, that is, if it is possible to have a register assignment without register spilling, our allocator can find it. We have the short and long versions of our paper here:

Chris Lattner wrote: > On Sat, 13 May 2006, Vladimir Prus wrote: >> in LLVM CVS the afore-mentioned function has 'const TargetRegisterClass*' >> parameter, that is not documented. >> >> Can somebody explain what does it mean? > > Basically, it gives the target more information about the spill. In > particular, it specifies the register class to use

What is the status of RegAllocLocal, RegAllocBigBlock and RegAllocSimple allocators? I am considering using one of them as a basis for a course project on register allocation in my class. In particular, are those allocators in regular use and/or have they been tested recently? I am particularly interested in the code as of version 4.0 but if anything has improved since then, the

Hi, in LLVM CVS the afore-mentioned function has 'const TargetRegisterClass*' parameter, that is not documented. Can somebody explain what does it mean? Thanks, Volodya

On Sat, 13 May 2006, Vladimir Prus wrote: > in LLVM CVS the afore-mentioned function has 'const TargetRegisterClass*' > parameter, that is not documented. > > Can somebody explain what does it mean? Basically, it gives the target more information about the spill. In particular, it specifies the register class to use for the copy. The target can choose to ignore this if it

Hi, I have a question about x86 code quality. I have run a few benchmarks and compared the running time of executables created by LLVM to executables created by gcc. It appears that code generated by LLVM is x1.5 - x3 times slower than code generated by gcc, for the x86 For some of the benchmarks the linear scan regalloc works. When it does, results are in the x1.0 - 1.5 range. Unfortunately,

Hi Chris, I saw this potential memory leak in RegAllocSimple.cpp. The PhysRegsEverUsed was being allocated but never freed. -bw Index: RegAllocSimple.cpp =================================================================== RCS file: /var/cvs/llvm/llvm/lib/CodeGen/RegAllocSimple.cpp,v retrieving revision 1.66 diff -a -u -r1.66 RegAllocSimple.cpp --- RegAllocSimple.cpp 22 Jan 2006 23:39:54 -0000

> I'm not sure about one thing: you assign stack slot to each new register you > replace the spilled one with. And then you need to allocate physical > registers to them. Is it possible to assign physical register to the virtual > one which has a stack slot already? > Yes. The stack slot is the place where the value will be stored in memory, but, when that value is effectively

Fernando Magno Quintao Pereira wrote: >> I'm not sure about one thing: you assign stack slot to each new register you >> replace the spilled one with. And then you need to allocate physical >> registers to them. Is it possible to assign physical register to the virtual >> one which has a stack slot already? >> > > Yes. The stack slot is the place where the

Dear LLVMers, I am trying to fold memory operands in the way that is done in RegAllocLocal.cpp, or in LiveIntervalAnalysis.cpp, but I am getting errors that I don't know how to fix. Could someone tell me which steps should I take in order to correctly fold memory operands? The code that I am using is: const TargetMachine & target_machine = this->machine_function->getTarget();

Hello, I'm getting an assertion in register allocator, specifically in LiveIntervalAnalysis.h, method LiveIntervals::getInstructionIndex: unsigned getInstructionIndex(MachineInstr* instr) const { Mi2IndexMap::const_iterator it = mi2iMap_.find(instr); assert(it != mi2iMap_.end() && "Invalid instruction!"); return it->second; } The crash happens

I'm not sure about one thing: you assign stack slot to each new register you replace the spilled one with. And then you need to allocate physical registers to them. Is it possible to assign physical register to the virtual one which has a stack slot already? On 8/21/06, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: > > > > So what addIntervalsToSpills

On Aug 13, 2006, at 11:16 PM, Fernando Magno Quintao Pereira wrote: > > Dear LLVMers, > > I am trying to fold memory operands in the way that is done in > RegAllocLocal.cpp, or in LiveIntervalAnalysis.cpp, but I am getting > errors > that > I don't know how to fix. Could someone tell me which steps should I > take > in order > to correctly fold memory

I tried both the most recent version of "simple" register allocation and the one from last August, and neither seems to work correctly (they run, but produce bad output). I used them to compile an old version of the Unix "replace" utility (source code attached). Here's how I created the executable: llvm-gcc -emit-llvm -O0 -c replace.c -o replace.bc opt -mem2reg

One of my pass requires LiveIntervals to build the interference graph, because LiveVariables do not provide an interface to iterate through all viritual registers. But LiveIntervalAnalysis.h is not in "include/llvm/CodeGen", so I have to either include it by: #include "../../llvm/lib/CodeGen/LiveIntervalAnalysis.h" or point my project include path to