similar to: [LLVMdev] What if there is no Legalized pass?

I get this failure when I go to compile the latest LLVM CVS source: if g++ -I/Users/wendling/llvm/llvm/lib/Target/Alpha -I/Users/wendling/llvm/llvm/lib/Target/Alpha -I/Users/wendling/llvm/llvm/include -I/Users/wendling/llvm/llvm/include -I/Users/wendling/llvm/llvm/include -I/Users/wendling/llvm/llvm/include -D_GNU_SOURCE -D__STDC_LIMIT_MACROS -Wall -W -Wwrite-strings -Wno-unused -g -D_DEBUG -c

On Mar 12, 2014, at 4:05 PM, Chandler Carruth <chandlerc at google.com> wrote: > > On Wed, Mar 12, 2014 at 3:50 PM, Arnold Schwaighofer <aschwaighofer at apple.com> wrote: > In order to vectorize code like this LLVM needs to prove that “A[i*7]” does not wrap in the address space. It fails to do so > > But, why? > > I'm moderately sure that neither C nor C++

On Wed, 11 May 2005, Tzu-Chien Chiu wrote: > On Tue May 10 2005, Chris Lattner wrote: >> On Tue, 10 May 2005, Morten Ofstad wrote: >>> Actually, I think it would be better to define the registers as a machine >>> value type for packed float x4, and providing some 'extract' and 'inject' >>> instructions to access individual components... There

On Apr 23, 2013, at 10:37 AM, Shuxin Yang <shuxin.llvm at gmail.com> wrote: > As far as I can understand of the code, the Reassociate tries to achieve this result by its "ranking" mechanism. > > If it dose not, it is not hard to achieve this result, just restructure the expression in a way such that > the earlier definition of the sub-expression is permute earlier in

Thanks for all replies, they have been very helpful! Note: Sorry, i forgot to group reply.... ---------- Forwarded message ---------- From: Duncan Sands <baldrick at free.fr> Date: 2011/9/4 Subject: Re: [LLVMdev] Some questions on SelectionDAG To: Zakk <zakk0610 at gmail.com> Hi Zak, Therefore, after the LegalizeType phase, maybe SelectionDAG have > unsupported > type

As far as I can understand of the code, the Reassociate tries to achieve this result by its "ranking" mechanism. If it dose not, it is not hard to achieve this result, just restructure the expression in a way such that the earlier definition of the sub-expression is permute earlier in the resulting expr. e.g. outer-loop1 x= outer-loop2 y =

It's an interesting problem. The best stuff I've seen published is by Cooper, Eckhart, & Kennedy, in PACT '08. Cooper gives a nice intro in one of his lectures: http://www.cs.rice.edu/~keith/512/2012/Lectures/26ReassocII-1up.pdf I can't tell, quickly, what's going on in Reassociate; as usual, the documentation resolutely avoids giving any credit for the ideas. Why is that?

On Apr 25, 2013, at 10:51 AM, Preston Briggs <preston.briggs at gmail.com> wrote: > It's an interesting problem. > The best stuff I've seen published is by Cooper, Eckhart, & Kennedy, in PACT '08. > Cooper gives a nice intro in one of his lectures: http://www.cs.rice.edu/~keith/512/2012/Lectures/26ReassocII-1up.pdf > I can't tell, quickly, what's going on

Hi, all I am studying the ARM backend on SelectionDAG, I have some following questions: 1. Each operator of SDNode in SelectionDAG is required to be defined by SDNode<ISD::XXX,XXX,XXX> in .td file, right? But several operators are not defined in .td file, why? (e.g., ISD::BR_CC, ISD::CopyToReg, ISD::AssertSext) 2. The MVT::glue value is used to ensure two nodes are scheduled

On Tue May 10 2005, Chris Lattner wrote: >On Tue, 10 May 2005, Morten Ofstad wrote: >> Actually, I think it would be better to define the registers as a machine >> value type for packed float x4, and providing some 'extract' and 'inject' >> instructions to access individual components... There should also be a >> 'shuffle' instruction

Hi I'm new in this field, have been reading a lot, and have a little question. could it be possible to connect an Avaya IP office pbx to asterisk using a E1/T1/Pri? Original instalation: Telefone company|Pri--->Pri|IP Pffice My Question: Telefone company|Pri --->TDM|Asterisk|TDM --->Pri|IP Office I know that it can be done by using h323, but I need a card on the IPOffice my

http://bugzilla.mindrot.org/show_bug.cgi?id=177 devel at homelinkcs.com changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |devel at homelinkcs.com ------- Comment #12 from devel at homelinkcs.com 2007-05-09 09:06 ------- (In reply to comment #11) So

Thanks all, I've incorporated all the feedback so far: http://llvm.org/ChrisLLVM/projects/llvm-www/releases/1.8/docs/ReleaseNotes.html -Chris On Tue, 8 Aug 2006, Bil wrote: > On Aug 8, 2006, at 10:28 AM, Chris Lattner wrote: >> >> Hi All, >> >> Here's the first draft of the LLVM 1.8 release notes. Please take a look >> and send me any comments

On Aug 8, 2006, at 10:28 AM, Chris Lattner wrote: > > Hi All, > > Here's the first draft of the LLVM 1.8 release notes. Please take > a look and send me any comments or feedback you have: > http://llvm.org/docs/ReleaseNotes.html > Trivial changes: * Most of LLVM is now built with "-pedantic", ensuring better portability to more C++ Compilers. Probably

Hi, I am investigating a performance degradation between llvm-3.1 and llvm-3.2 (Note: current top-of-tree shows a similar degradation) One issue I see is the following: - 'loop invariant code motion' seems to be depending on the result of the 'reassociate expression' pass: In the samples below I observer the following behavior: Both start with the same expression: %add = add

>I think that the first step would be to expose Target Lowering Interface (TLI) to OPT's IR-level passes. By "lowering", we assume the bitcode is more abstract than the machine code. However, in some situations, it is just opposite. For instance, some architectures support vectorization of min/max/saturated-{add,sub)/conditional-assignment/etc/../etc. We need to detect such

Chris Lattner wrote: > None, that documentation is out of date and doesn't make a ton of sense > for your application. I would suggest that you implement it in the > context of the SelectionDAG framework that all of the code generators > either currently use or are moving to. I updated the documentation > here:

On Thu, Apr 25, 2013 at 9:18 AM, Arnold Schwaighofer < aschwaighofer at apple.com> wrote: > > On Apr 25, 2013, at 10:51 AM, Preston Briggs <preston.briggs at gmail.com> wrote: > > > It's an interesting problem. > > The best stuff I've seen published is by Cooper, Eckhart, & Kennedy, in PACT '08. > > Cooper gives a nice intro in one of his

> Can you suggest a good way to use the loops and induction variable > passes to map loop exiting BasicBlocks to InductionVariables. That is, > can we use these tools to identify the loop condition. I can try. :) It looks like you're running into problems because we don't perform "Linear Function Test Replacement". This optimization would reduce the amount of code

Hi All, Here's the first draft of the LLVM 1.8 release notes. Please take a look and send me any comments or feedback you have: http://llvm.org/docs/ReleaseNotes.html Thanks! -Chris -- http://nondot.org/sabre/ http://llvm.org/