similar to: [LLVMdev] Showstopper on Visual C

Displaying 20 results from an estimated 400 matches similar to: "[LLVMdev] Showstopper on Visual C"

2004 Oct 12
0
[LLVMdev] Showstopper on Visual C
struct X86AsmPrinter is in an anonymous namespace, but printInstruction is declared in namespace llvm. try editing the tablegen output to move X86AsmPrinter::printInstruction into an anonymous namespace, not llvm. I suspect this will at least fix the first problem. Then we can figure out the proper longterm fix. Andrew On Tue, 2004-10-12 at 03:56, Paolo Invernizzi wrote: > Hi all, >
2004 Oct 07
2
[LLVMdev] RE: MinGW Tablegen
Hi As requested from Paolo, I've sent him the tablegen tool. The tool is able to compile the td files (given in the makefile) on windows without any complaints. Henrik >From: Paolo Invernizzi <arathorn at fastwebnet.it> >Date: Thu, 7 Oct 2004 14:27:11 +0200 > >Hi Henrik, > >As you may remember, I'm trying to use the LLVM core tools under Visual >Studio.
2004 Oct 08
0
[LLVMdev] RE: MinGW Tablegen
Some problems... (or I'm missing something...) 1) asmwriternum seems to be not supported... scons: Building targets ... d:/home/arathorn/sandbox/llvm/tblgen.exe -gen-asm-writer -asmwriternum=1 -I llvm\lib\Target\X86 -o tablegen_includes\X86GenIntelAsmWriter.inc llvm\lib\Target\X86\X86.td llvm\lib\Target\X86\X86InstrInfo.td llvm\lib\Target\X86\X86RegisterInfo.td llvm\lib\Target\Target.td
2004 Sep 24
2
[LLVMdev] Little win32/Signals.cpp patch
Jeff Cohen wrote: >But I compiled that under vc7.1 as it was! > > ;-(( Probably is an implicid includes, but I'm using the STLPort standard library for LLVM (because it's not possible to use hash_map and hash_set of microsoft) cl /nologo /TP /EHsc /GR /Zi /Yd /D__STDC_LIMIT_MACROS /DHAVE__FINITE_IN_FLOAT_H /DHAVE__ISNAN_IN_FLOAT_H /DHAVE_WINDOWS_H
2004 Sep 24
0
[LLVMdev] Little win32/Signals.cpp patch
But I compiled that under vc7.1 as it was! On Fri, 24 Sep 2004 15:19:22 +0200 Paolo Invernizzi <arathorn at fastwebnet.it> wrote: > Adding an include for std::remove under vc7.1 > > --- > Paolo Invernizzi >
2004 Sep 24
3
[LLVMdev] Little win32/Signals.cpp patch
Adding an include for std::remove under vc7.1 --- Paolo Invernizzi -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: diff.txt URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20040924/e1ca1218/attachment.txt>
2004 Dec 03
2
[LLVMdev] [Fwd: Updated LLVM Visual Studio project files]
Could someone please apply this patch to the Win32 support so that Morten and Jeff can handle the recent changes? I can't do it because I"m on the road with only email access. Thanks, Reid. -----Forwarded Message----- > From: Morten Ofstad <morten at hue.no> > To: Reid Spencer <reid at x10sys.com> > Subject: Updated LLVM Visual Studio project files > Date: Thu,
2018 Jun 30
2
Using BuildMI to insert Intel MPX instruction BNDCU failed
Hello everyone, I'm a newbie of llvm. I'm trying to insert Intel MPX instruction BNDCU with BuildMI. I add my machinefunctionpass at addPreEmitPass2. Here is the code of insertion: BuildMI(MBB, MI, DL, TII->get(X86::BNDCU64rr)).addReg(X86::BND2, RegState::Define).addReg(X86::R10); And here is to stack track when I compiler program with modified llc:
2012 May 11
1
[LLVMdev] 2 versions of printInstruction()
Hi, LLVMers, I notice that there are two versions of printInstruction() generated by tablegen: (1) XXXInstPrinter::printInstruction(const MCInst *MI, raw_ostream &os), like for X86. (2) XXXAsmPrinter::printInstruction(const MachineInstr *MI, raw_ostream &os), like for Sparc. I guess Sparc backend directly transform MachineInstr objects into ostream, while X86 backend convert
2005 Jul 01
4
[LLVMdev] X86AsmPrinter + MASM and NASM backends
Chris, Okay, I have done as you have requested. The only thing I did not like was a clsh between the enum X86 and the new namespace X86, which I had to rename as x86 :( Anyway, I suppose the lower case 'x' in 'x86' fits in with the lowercase 'llvm' namespace. Build tested on MS VC2003 and Linux. Aaron -------------- next part -------------- A non-text attachment was
2005 Jul 02
0
[LLVMdev] X86AsmPrinter + MASM and NASM backends
I am now getting the following link errors on all executables: x86.lib(X86AsmPrinter.obj) : error LNK2001: unresolved external symbol "public: virtual bool __thiscall llvm::x86::X86ATTAsmPrinter::runOnMachineFunction(class llvm::MachineFunction &)" (?runOnMachineFunction at X86ATTAsmPrinter@x86 at llvm@@UAE_NAAVMachineFunction at 3@@Z) x86.lib(X86AsmPrinter.obj) : error LNK2001:
2005 May 10
2
[LLVMdev] NASM Backend
Hi again, I have put together a "blank skeleton" for a X86NASMPrinter class, with effectively the same behaviour as the X86IntelAsmPrinter class. I had to do this within the X86AsmPrinter.cpp file rather than as a separate source file as the dependancies were so. Please do not commit this yet, I have included it not for confidence sake :)) I do not know whether it is a good idea to
2009 Jul 10
2
[LLVMdev] MCInst
Can someone explain what MCInst is vs. MachineIntr? I'm porting some patches we have here that affect MachineInstrs and am wondering whether I need to make similar changes in MCInst. Why do we have two machine instruction representations? -Dave
2009 Jun 17
2
[LLVMdev] Loop alignment
On Wednesday 17 June 2009 00:11, Evan Cheng wrote: > Asm printer. Yes, but where? I can't find it. What do I need to search for? -Dave
2012 Sep 08
2
[LLVMdev] LLC always has a tab?
I'm building a target for the intermediate language of another compiler. The other intermediate language is close to an assembly language (RTL, 1 operation per line), so I based my target off of the Mips target. However, the intermediate language i'm targetting does not support tabs before the instructions. I've looked through the files and found that the tab comes from the
2018 Nov 11
2
Convert Register Names to String
Hi. I want to do a cutomized points-to analysis on IR. Suppose that we have: *%91 = bitcast i8* %90 to %struct.demux_packet*, !dbg !2688* I want to store sth similar to %91 -> target of %90, which records the target of pointer named %91. How can I access the names (Here, %90 and %91)? I know that I can put the whole line for an instruction into a string, using the following code: *string str;*
2009 Jun 17
0
[LLVMdev] Loop alignment
> On Wednesday 17 June 2009 00:11, Evan Cheng wrote: >> Asm printer. > > Yes, but where? I can't find it. What do I need to > search for? ViewVC is helpful :- http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/ Look at the X86IntelAsmPrinter.cpp file for code outputting the align, if its not there it maybe in the X86AsmPrinter.cpp file, meaning
2015 Jul 28
2
[LLVMdev] Wrong encoding/decoding for POPC instruction of Sparc
Hello, There is an issue in the latest Sparc code: while we can encode POPC, decode results in crash in llvm-mc $ echo "popc %g1, %g2" | ./Release+Asserts/bin/llvm-mc -assemble -triple=sparcv9 -show-encoding .text popc %g1, %g2 ! encoding: [0x85,0x70,0x00,0x01] $ echo "0x85,0x70,0x00,0x01"|./Release+Asserts/bin/llvm-mc -disassemble -triple=sparcv9
2009 Jul 10
0
[LLVMdev] MCInst
On Jul 9, 2009, at 5:34 PM, David Greene wrote: > Can someone explain what MCInst is vs. MachineIntr? Sure. MCInst is designed to be part of the "MC" set of libraries, which is stuff dealing with machine code. We're building a suite of assemblers and disassemblers out of this. MCInst is integral to this plan. For an assembler you have two pieces: 1. "Recognize"
2006 May 01
2
[LLVMdev] problems with tablegen and namespaces
I am trying to write a skeleton of an ARM back end. I have declared the following class class InstARM<dag ops, string asmstr, list<dag> pattern> : Instruction { let Namespace = "ARM"; dag OperandList = ops; let AsmString = asmstr; let Pattern = pattern; } and defined three instructions (ldr, str, and mov). The problem is that, in the generated code, the