similar to: [LLVMdev] MachineFunction::create docs

Hello, I'm considering a possibility of writing an llvm backend for my research uses. Unfortunately, I can't find much information on how do to it. I more or less understood now the C backend is implemented, but for real backend I'd need at least register allocation. I beleive there's already register allocator in LLVM and I would like to reuse it if possible. The question is

The attached patch fixes an error message emitted by tblgen when no subclasses of 'Target' are defined. In the current version the message is ERROR: Multiple subclasses of Target defined! which is a bit confusing. - Volodya -------------- next part -------------- A non-text attachment was scrubbed... Name: CodeGenWrappers.diff Type: text/x-diff Size: 1057 bytes Desc: not available

On Wednesday 04 May 2005 18:34, Chris Lattner wrote: > On Wed, 4 May 2005, Vladimir Prus wrote: > > %tmp.aux = cast bool %tmp.24 to int > > %tmp.x = xor int %tmp.aux, 1 ; negates tmp.24 > > %tmp.xx = cast int %tmp.x to bool > > %tmp.y = or bool %tmp.xx, %tmp.24 ; will be always true > > br bool %tmp.y,

Misha Brukman wrote: > LLVM Machine code is in SSA. This explains quite a lot. I though it's possible to just reduce convert phis into copy instructions in predecessors -- all of which will have the same destination register. > gets you two definitions of r. So we have machine PHI nodes merge the > two possible values into one for result of r. These phis get removed > after

Could anybody quickly explain why PHI nodes instructions are necessary in machine code? And why the code in LiveVariables.cpp which looks at those PHI nodes (line 249 and below) is necessary. The reason I'm asking is that I try to support 64-bit comparison and I do it by generating code like: // if high1 cond high2: goto operand0 // if high1 reverse_cond high2:

On Wed, Oct 20, 2004 at 11:59:45AM -0700, Yiping Fan wrote: > Yeah. We need to have more extra fields in the instruction. Fo > example, during high-level synthesis, we must schedule an instruction > to a certain control step (or cycle), and bind it to be execute on a > certain functional unit, etc. Since we're talking about "execution" and "scheduling", you

Did someone make a change in MachineFunction and forget to update something? g++ -I/Volumes/data/Wendling/llvm-submission/build/obj/obj-llvm/lib/CodeGen -I/Volumes/data/Wendling/llvm-submission/build/obj/src/llvm/lib/CodeGen -I/Volumes/data/Wendling/llvm-submission/build/obj/obj-llvm/include -I/Volumes/data/Wendling/llvm-submission/build/obj/src/llvm/include

Yiping, Could you describe in a little more detail what your goals are? I agree with Reid and Misha that modifying the instruction definition is usually not advisable but to suggest alternatives, we would need to know more. Also, for some projects it could make sense to change the instruction set. --Vikram http://www.cs.uiuc.edu/~vadve http://llvm.cs.uiuc.edu/ On Oct 20, 2004, at 2:41 PM,

hi, I'm really new to llvm. I've successfully bootstrapped llvm-14 on my system and am able to successfully compile c code to llvm. the problem is now that gccld is complaining that it can't find the libraries, like "c" or "crtend". [1] all is fine, if I just use intrinsified functions like printf and friends, but I want to use the clock_gettime function and

I'm CC'ing the llvm-dev list because other people are more knowledgeable about the bytecode format/encoding than I am. Please follow-up the replies to the list. On Wed, Oct 20, 2004 at 11:27:53AM -0700, Yiping Fan wrote: > We also want to extend the llvm instructions/intrinsic > functions/types/passes to support our high-level synthesis for > hardware. First of all, we want to

Yeah. We need to have more extra fields in the instruction. Fo example, during high-level synthesis, we must schedule an instruction to a certain control step (or cycle), and bind it to be execute on a certain functional unit, etc. Besides the in-memory exchange of the information, we also want on-disk exchange. That introduces the write-out/parse-in problem. Thanks ----- Original Message -----

On Thu, May 05, 2005 at 09:47:50AM +0400, Vladimir Prus wrote: > > Actually, the -instcombine pass already does this. Please try it > > out and let me know if it doesn't do what you want. > > It does work! For some reason, I was assuming that running 'opt' > without arguments would run some "reasonable" set of optimizations, > while in reality, it

Vikram, I also agree with you. I understand that target-independent representation is very valuable and important for software compilation. However, when we are doing high-level synthesis (also called behavioral/architectural synthesis), the targeting architecture is also changing. That is, we need to do architecture exploration and the IR transfromation simultaneously. For example,

Hey, Jakob -- On Tue, Mar 01, 2005 at 05:55:07PM +0100, Jakob Praher wrote: > I'm really new to llvm. I've successfully bootstrapped llvm-14 on my > system and am able to successfully compile c code to llvm. > > the problem is now that gccld is complaining that it can't find the > libraries, like "c" or "crtend". [1] Did you install the bytecode

PHI nodes within machine code were originally used by the Sparc back-end but they turned out not to be necessary. Instead, LLVM phis are lowered to copy instructions in the machine code (I believe this happens just after instruction selection). As far as I know, the machine PHI nodes are not used by the x86 back-end and you shouldn't need them if you insert the right copies. --Vikram

On Fri, 9 Jul 2004, Vladimir Prus wrote: > Misha Brukman wrote: > > > LLVM Machine code is in SSA. > > This explains quite a lot. I though it's possible to just reduce convert phis > into copy instructions in predecessors -- all of which will have the same > destination register. There are algorithms for eliminating PHI nodes, but they aren't quite so simple.

Hi I have a ModulePass in LLC that runs after most of codegen completes, right before OBJ emission. I want the ModulePass to iterate over all MachineFunctions, emulating them. I used to do this by iterating over all Module Function's, and using MachineFunction::get() to get the MachineFunction associated with said Function. In LLVM 2.6, MachineFunction::get() is gone. What is the new way

Thanks, Ralph, this line worked well :) Here it is, my first patch to LLVM :) I've changed all allocation_order_begin() and allocation_order_end() methods to take const MachineFunction &MF as a parameter. I also added const version of MachineFunction::getInfo<Ty>() method. And I changed three static hasFP() functions to take const reference to MachineFunction. While doing this

Actually, Misha, that won't work. The -C option is used directly in docs/Makefile. So the change will have to go into docs/Makefile. Either that or upgrade install to version 5. Reid. On Thu, 2005-02-17 at 11:33, Misha Brukman wrote: > On Thu, Feb 17, 2005 at 01:21:20PM -0600, Feng Chen wrote: > > llvm[1]: Installing HTML documentation > >

On Tuesday 22 March 2005 20:34, Chris Lattner wrote: > Can you explain the problem in more detail? Specifically the LLVM code > gneerator assumes that there is some alignment that the stack is required > to have as part of its ABI. For example, in X86 target machine, the stack > is 8-byte aligned on entry to function calls. > > What this means is that the frame info can assume