similar to: [LLVMdev] global register allocators and spill code

Displaying 20 results from an estimated 10000 matches similar to: "[LLVMdev] global register allocators and spill code"

2004 Sep 23
2
[LLVMdev] global register allocators and spill code
Hello Alkis, I am writting a global register allocator, and while I was searching the web to find useful links I found your message LLVMers: http://mail.cs.uiuc.edu/pipermail/llvmdev/2004-February/000860.html I would appreciate it if you could send me the code or tell me how to access it. Thanks, Samah
2010 Aug 16
0
[LLVMdev] NumLoads/NumStores for linearscan?
On Aug 15, 2010, at 5:12 PM, Silvio Ricardo Cordeiro wrote: > Is there a way for me to collect statistics about the number of loads/stores added by the "linearscan" register allocator (just like can be done with the "local" allocator)? I still haven't grokked very well the interaction between RALinScan and Spiller... Should I add those two statistics to the
2010 Aug 24
2
[LLVMdev] NumLoads/NumStores for linearscan?
On Sun, Aug 15, 2010 at 10:04 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk>wrote: > > On Aug 15, 2010, at 5:12 PM, Silvio Ricardo Cordeiro wrote: > > > Is there a way for me to collect statistics about the number of > loads/stores added by the "linearscan" register allocator (just like can be > done with the "local" allocator)? I still haven't
2012 Apr 14
0
[LLVMdev] Spilling in Register allocator.
Hi, I am currently working on a simple graph coloring based register allocator on llvm. So far my code builds the interference graph and assigns physical registers using the VirtRegMap. However I am facing some trouble while spilling. I used *assignVirt2StackSlot* method of VirtRegMap and got “UNREACHABLE EXECUTED” error. I would like to know if simply calling this method is enough to
2005 Sep 07
0
[LLVMdev] LiveIntervals, replace register with representative register?
On Wed, 7 Sep 2005, Tzu-Chien Chiu wrote: > I don't understand the following code snippet in LiveIntervalAnalysis.cpp. > > Why changing the type of the opreand from a virtual register to a > machine register? The register number (reg) is still a virtual > register index (>1024). This code isn't actually replacing the virtual register with a physreg. As you noticed, it
2006 May 24
1
[LLVMdev] Re: Spilling register and frame indices
Chris Lattner wrote: >> and then have 'virtual_register' allocated on next iteration of register >> allocator? > > This is one approach. Another approach is to have to spiller scavange > registers, which is the subject of this enhancement request: > http://llvm.org/PR768 Can you given some references for this "scavange" thing? Google and ResearchIndex
2006 May 23
0
[LLVMdev] Spilling register and frame indices
On Tue, 23 May 2006, Vladimir Prus wrote: > right now, LLVM does register spilling by: > > 1. Creating stack object > 2. Passing index of that stack object to MRegisterInfo::storeRegToStackSlot > 3. At later stage, frame indices are replaced by calling to > MRegisterInfo::eliminateFrameIndex. > > This works for me, but there's slight problem. The target does not have
2009 Oct 22
0
[LLVMdev] request for help writing a register allocator
Hi Susan, > But this doesn't seem to be happening; the stores to memory are there but > the loads are not. > > Any ideas what's going wrong? Are you using VirtRegMap::addSpillPoint and VirtRegMap::addRestorePoint ? If not you may need to add calls to them to let the rewriter know where to insert the loads/stores. > If not, any advice on how to generate the loads
2005 Sep 07
4
[LLVMdev] LiveIntervals, replace register with representative register?
I don't understand the following code snippet in LiveIntervalAnalysis.cpp. Why changing the type of the opreand from a virtual register to a machine register? The register number (reg) is still a virtual register index (>1024). bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) { // perform a final pass over the instructions and compute spill // weights, coalesce
2011 Sep 16
1
[LLVMdev] Linear scan is going away after 3.0
I will be removing RegAllocLinearScan and VirtRegRewriter from trunk shortly after we cut the 3.0 release branch. LLVM 3.0 will still ship with the linear scan register allocator, but the default will be the new greedy allocator. Linear scan can be enabled by passing '-regalloc=linearscan -join-physregs' to llc. RegAllocLinearScan and VirtRegRewriter need to go away soon because they
2006 Aug 23
1
[LLVMdev] Recalculating live intervals
Fernando Magno Quintao Pereira wrote: >> I'm not sure about one thing: you assign stack slot to each new register you >> replace the spilled one with. And then you need to allocate physical >> registers to them. Is it possible to assign physical register to the virtual >> one which has a stack slot already? >> > > Yes. The stack slot is the place where the
2007 Aug 07
0
[LLVMdev] Spillers
Hi, Sorry for the delay. I was trying to wrap my head around some live interval analysis code and have forgotten about emails. :-) On Aug 6, 2007, at 9:20 AM, David Greene wrote: > Can someone explain the theory behind the spillers in VirtRegMap.cpp? > > It seems as though the spillers do triple duty: > > - Insert load/store operations and/or fold instructions as >
2007 Aug 06
5
[LLVMdev] Spillers
Can someone explain the theory behind the spillers in VirtRegMap.cpp? It seems as though the spillers do triple duty: - Insert load/store operations and/or fold instructions as necessary to carry out spills - Rewrite the spilled virtual registers to use machine registers (mapping given by the caller in the VRM). - Rewrite machine code to change virtual registers to physical registers
2009 Jun 05
0
[LLVMdev] Removing SimpleRewriter (formerly SimpleSpiller)
The new spilling framework inserts spill code in-place (during register allocation) rather than deferring it using VirtRegMap/VirtRegRewriter. The goal is to enable techniques like iterative splitting to be implemented. It should also be a bit tidier as it keeps more state in the MachineFunction, rather than in book-keeping structures like VirtRegMap. The work is in the very early stages though.
2009 Feb 28
1
[LLVMdev] Easiest way to rewrite machine instructions when each live range of a LiveInterval may be assigned a different physical register
Hi Evan, Thanks a lot for your reply! 2009/2/27 Evan Cheng <evan.cheng at apple.com>: > > On Feb 27, 2009, at 7:20 AM, Roman Levenstein wrote: > >> Hi, >> >> I'm working on the implementation of Extended Linear Scan register >> allocator as described by Sarkar & Bodik. >> One of the interesting features of their algorithm is the possibility
2006 Aug 21
0
[LLVMdev] Recalculating live intervals
> I'm not sure about one thing: you assign stack slot to each new register you > replace the spilled one with. And then you need to allocate physical > registers to them. Is it possible to assign physical register to the virtual > one which has a stack slot already? > Yes. The stack slot is the place where the value will be stored in memory, but, when that value is effectively
2006 Aug 14
2
[LLVMdev] Folding instructions
Dear LLVMers, I am trying to fold memory operands in the way that is done in RegAllocLocal.cpp, or in LiveIntervalAnalysis.cpp, but I am getting errors that I don't know how to fix. Could someone tell me which steps should I take in order to correctly fold memory operands? The code that I am using is: const TargetMachine & target_machine = this->machine_function->getTarget();
2008 Sep 20
0
[LLVMdev] Using VirtRegMap
Hi Evan, > Ok. Everyone has different idea about "easy". :-) I second your opinion that it is not very easy to use and it is very tightly coupled with the current linear scan register allocator implementation. > But VirtRegMap is going to be remove one of these days. When are you going to do that? Are you going to remove it from the source tree? Will it be replaced with
2005 Sep 07
0
[LLVMdev] LiveIntervals, replace register with representative register?
On Wed, 2005-09-07 at 15:09 +0800, Tzu-Chien Chiu wrote: > I don't understand the following code snippet in LiveIntervalAnalysis.cpp. > > Why changing the type of the opreand from a virtual register to a > machine register? The register number (reg) is still a virtual > register index (>1024). > > > bool LiveIntervals::runOnMachineFunction(MachineFunction &fn)
2009 Oct 29
1
[LLVMdev] request for help writing a register allocator
I'm having no luck getting my register allocator to work. I'm trying to do it using the "indirect" approach; i.e., using a VirtRegMap, with calls to assignVirt2Phys, assignVirt2StackSlot, etc. and a call to a "spiller" at the end. As a warm-up exercise (before implementing register allocation via graph coloring) I'm trying to implement a very simple scheme in