similar to: [LLVMdev] Re: phi nodes

Here's what I've got so far - it seems to work, aside from the fact that DeleteDeadPHIs is not removing at least one dead PHI in my test program. --------------------- static bool mergeBlockIntoSuccessor(BasicBlock *pred, BasicBlock *succ) { if (succ == pred) return false; if (pred->getFirstNonPHI() != pred->getTerminator()) return false; //

Hi all, I was trying to implement an obfuscation tool for C-code on the basis of LLVM. I got a prototype of the simple obfuscation transformation which converting control flow graph to something like a state machine. I am not sure I will have time to work on extending further this tool with new transformations like opaque predicates and decided to put here source code I have by now with hope

Hi, I got a problem when I am trying to add a dummy basic block. Let say there are two blocks, A and B. A----->B I am trying to generate new BB called C which is located between A and B, but not break the edge of AB. The graph is like the following A---->B \ / \ / C There is new BB 'C' with edges AC and CB. It is kind of like what breakcriticaledge pass does.

On Feb 1, 2011, at 1:34 PM, Andrew Trick wrote: > On Feb 1, 2011, at 1:08 PM, Andrew Clinton wrote: > >> I have a (non-entry) basic block that contains only PHI nodes and an >> unconditional branch (that does not branch to itself). Is it always >> possible to merge this block with it's successor and produce a >> semantically equivalent program? I'm

Hi, I've been writing an optimization pass (described on the ML previously). Sometimes this pass removes some case entries from switch instructions, which cause an abort because removeCase() doesn't fix the PHINodes predecessors when needed. e.g.: define i32 @foo() nounwind { ifthen: %call = call i32 @bar() switch i32 %call, label %myphi [ i32 0, label %ifelse i32 1, label

Misha Brukman wrote: > LLVM Machine code is in SSA. This explains quite a lot. I though it's possible to just reduce convert phis into copy instructions in predecessors -- all of which will have the same destination register. > gets you two definitions of r. So we have machine PHI nodes merge the > two possible values into one for result of r. These phis get removed > after

On Thu, Jul 08, 2004 at 08:06:29PM +0400, Vladimir Prus wrote: > Could anybody quickly explain why PHI nodes instructions are necessary > in machine code? And why the code in LiveVariables.cpp which looks at > those PHI nodes (line 249 and below) is necessary. LLVM Machine code is in SSA. Let's say you want to do r = a cond b But doing this: if (a cond b) then r = 1

Today, the IR requires that if you have multiple edges from A to B (typically with a switch) any phi nodes in B must have an equal number of entries for A, but that all of them must have the same value. This seems rather annoying.... 1) It creates multiple uses of values in A for no apparently good reason 2) It makes updating PHI nodes using sets of predecessors incredibly hard 3) There is no

Hi folks, Hope this is not a silly question. But it bothers me when I am thinking about it. My question is: 1. In the implementation of serverSplitPHINodes(), why it only checks the first PHI node for possible multiple inputs from outside the region to extract. There could be more than one PHI nodes in the header block, and the code only checks the first one. I don't quite get it.

If we decide not to be legal, should we change the verify to reject it? What happens to the test cases that currently test this very situation (eg. Transforms/LoopVectorize/phi-hang.ll)? The change as suggested by Philip is: - Assert(InstsInThisBlock.count(Op) || DT.dominates(Op, U), + Assert((!isa<PHINode>(I) && InstsInThisBlock.count(Op)) || + DT.dominates(Op, U), +

Hi, On Mon, May 1, 2017 at 8:47 AM, Daniel Berlin via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> Today, the IR requires that if you have multiple edges from A to B >> (typically with a switch) any phi nodes in B must have an equal number of >> entries for A, but that all of them must have the same value. > >> This seems rather annoying.... >> 1) It

Hi, I'm trying to implement superblock analysis as an LLVM pass. In my code, a basic block is sometimes cloned and inserted into a neighboring position in the cfg, with the same successors as the original basic block. The frequently executed edge will have one predecessor, and all other predecessor edges go to the cloned block. If there are phi nodes in the successors, they are

You can call addIncoming(). /// addIncoming - Add an incoming value to the end of the PHI list /// void addIncoming(Value *V, BasicBlock *BB) { assert(V && "PHI node got a null value!"); assert(BB && "PHI node got a null basic block!"); assert(getType() == V->getType() && "All operands to PHI node must be the same

On Fri, 9 Jul 2004, Vladimir Prus wrote: > Misha Brukman wrote: > > > LLVM Machine code is in SSA. > > This explains quite a lot. I though it's possible to just reduce convert phis > into copy instructions in predecessors -- all of which will have the same > destination register. There are algorithms for eliminating PHI nodes, but they aren't quite so simple.

Nuno Lopes wrote: > PHINode should have one entry for each predecessor of its parent basic > block! > %ret.0 = phi i32 [ 0, %ifthen ], [ 1, %ifelse ] ; <i32> > [#uses=1] > Broken module found, compilation aborted! > > This is because myphi is not reachable from ifthen anymore. My question is: > is this a bug (or missing feature) or do I need to

Hi, Simple description of the problem below. I have code coming into pruneEH as follows fn a { entry: call fn b ... for_cond: %i = phi [1, entry] [%x, for_body] cmp $i with someval cond-br for_body or for_exit for_body: ... $x = $i + 1 branch for_cond for_exit ... } PruneEH determines that the call to fn-b won't return. The code is modified thus. fn a { entry: call fn b unreachable insn

I'm running into an error message about PHINode which I don't understand too well. Hopefully I can explain this clearly. At a high level, I'm just trying to add a fprintf() statement at the end of functions to show me a timestamp. However, I also add an if/then such that I can turn the printing on/off. When using llvm-gcc, I've disabled linker and assembler optimizations in

Could anybody quickly explain why PHI nodes instructions are necessary in machine code? And why the code in LiveVariables.cpp which looks at those PHI nodes (line 249 and below) is necessary. The reason I'm asking is that I try to support 64-bit comparison and I do it by generating code like: // if high1 cond high2: goto operand0 // if high1 reverse_cond high2:

Hi, We're having an issue with TailDuplication in our out-of-tree target and it's this PHI-node that seems to be the cause of the trouble: %vreg2<def> = PHI %vreg0, <BB#2>, %vreg1, <BB#3>; rN:%vreg2 aNlh_0_7:%vreg0 aNlh_rN:%vreg1 Note that the defined %vreg2 has register class "rN" while the read %vreg0 has register class "aNlh_0_7".

On Feb 1, 2011, at 1:08 PM, Andrew Clinton wrote: > I have a (non-entry) basic block that contains only PHI nodes and an > unconditional branch (that does not branch to itself). Is it always > possible to merge this block with it's successor and produce a > semantically equivalent program? I'm trying to undo some of the loop > optimizations that LLVM has applied to my