similar to: LLVM 2.0 Release

Hi Everyone, It is getting to be that time again. I've scoured llvm-commits and collected a list of some of the major features we've developed since the last status update (from Feb 21). Please take a look and send me (off list) additions, feedback, corrections, etc. As usual, if I missed something, it's probably because there is such a huge amount of stuff happening,

Hi Everyone, I'm happy to say that LLVM has made many leaps and bounds since the last update in November. Because we are bumping the major version number with this release, we're letting the release go for twice as long as our planned release schedule (6 months instead of 3). We are currently half way through the LLVM 2.0 development cycle. So far, many important and invasive changes

Hi All, Here's the first draft of the release announcement for LLVM 1.9 that I'm working on. I'm sure I've forgotten and overlooked something, if so, please let me know! ----- 8< ------ 8< ----- <notes> Note: LLVM now correctly builds itself and passes all regression tests on Darwin X86 and Darwin PPC. No one has tried other targets to my knowledge. We hit

On May 27, 2008, at 5:36 PM, David Greene wrote: > I've been playing around with spillers and found that the > SimpleSpiller fails > badly on a particular code. > > The problem arises because SimpleSpiller does the test > VRM.isAssignedReg(virtReg) which is implemented as: > > 00183 bool isAssignedReg(unsigned virtReg) const { > 00184 if

LLVM 1.9 is available now! Download it here: http://llvm.org/ releases/ or view the release here: http://llvm.org/releases/1.9/docs/ ReleaseNotes.html This is a huge new release with many improvements, new features, better codegen, faster compiles, and many bugs fixed. One telling feature is that LLVM now correctly builds itself and passes all its regression tests when self-hosted: an

I've been playing around with spillers and found that the SimpleSpiller fails badly on a particular code. The problem arises because SimpleSpiller does the test VRM.isAssignedReg(virtReg) which is implemented as: 00183 bool isAssignedReg(unsigned virtReg) const { 00184 if (getStackSlot(virtReg) == NO_STACK_SLOT && 00185 getReMatId(virtReg) == NO_STACK_SLOT)

Chris Lattner wrote: > x. Roman Samoilov contributed a new MSIL backend to LLVM. llc - > march=msil will now turn LLVM into MSIL (".net") bytecode. This is > still fairly early development with a number of limitations. > This ought not be advertised to the world. It is not useful for any purpose. Not only can it not do virtual method calls, as I previously

On Mon, 14 May 2007, Jeff Cohen wrote: > Chris Lattner wrote: >> x. Roman Samoilov contributed a new MSIL backend to LLVM. llc - >> march=msil will now turn LLVM into MSIL (".net") bytecode. This is still >> fairly early development with a number of limitations. > This ought not be advertised to the world. It is not useful for any purpose. Jeff,

lib/CodeGen/RegAllocLocal.cpp:38: warning: 'NumFolded' defined but not used This has been introduced because of r46821. However, maybe removing just the variable isn't enought, because the comments in the section that got modified by 46821 are not optimal: if (PhysReg) { // Register is available, allocate it! assignVirtToPhysReg(VirtReg, PhysReg); } else { // No

On Sep 10, 2012, at 2:26 AM, Lang Hames <lhames at gmail.com> wrote: > I've got a good test case that I'm working on at the moment. I noticed something odd though: Is '0' a valid register unit? I'm seeing a LiveInterval with li->reg == 0 show up, which previously wasn't valid. We have a few checks around the place to disregard the '0' physreg - could

Hey all, I've found a bug in either the PBQP register allocator or in VirtRegRewriter. I'm observing this assertion in VirtRegRewriter::rewrite() fail: unsigned VirtReg = MO.getReg(); unsigned PhysReg = VRM->getPhys(VirtReg); ... assert(!MRI->isReserved(PhysReg) && "Reserved register assignment"); Indeed there is a case where

I'm happy to announce that Apple is contributing some major extensions to the LLVM ARM backend. The improvements include support for ARM v4/v6, vfp support, soft float, pre/postinc support, load/ store multiple generation, constant pool entry motion (to support large functions), and support for the darwin/arm ABI. In addition to ARM support, the backend now includes code generation

On Sat, May 16, 2009 at 5:09 PM, Anton Korobeynikov <anton at korobeynikov.info > wrote: > Hello, > > > As for the state of the MSIL backend of LLVM, I don't think it's for > > production use yet. Assemblies have lots of information in them and > > maintaining them during the MSIL -> LLVM -> MSIL translations should be > > the hard part. > This

Both backends are important but I find it more important the MSIL backend, for now. It's a shame that nobody is picking up the MSIL backend; it would be useful another backend that is machine-independent and that has support for several tools. -----Mensagem original----- De: llvmdev-bounces at cs.uiuc.edu em nome de Bruno Cardoso Lopes Enviada: qua 05-11-2008 19:47 Para: LLVM Developers

Hello, > As for the state of the MSIL backend of LLVM, I don't think it's for > production use yet. Assemblies have lots of information in them and > maintaining them during the MSIL -> LLVM -> MSIL translations should be > the hard part. This should be pretty hard. MSIL is definitely much more high level than LLVM, that's why significant portion of information will

Hello, Jeff. > I'm confused. A MSIL front end I can understand, but a back end? How > will it be used? The GCC-based front ends that come with LLVM generate > bytecodes that have dependencies on the GCC runtime, which is not going > to be present in a .NET environment. Well. It's LLVM-to-MSIL translator. So, if the source use some unsupported code... The same situation

Anton Korobeynikov wrote: > Hello, Everyone. > > We've just commited new backend for LLVM: MSIL. The author of backend is > Roman Samoilov from Codedgers Inc. (roman at codedgers.com). Backend itself > is very similar to C backend (and actually was based on it). Note, it's > pure LLVM-to-MSIL translator, so no additional checks etc. are > performed. > I'm

On Nov 26, 2009, at 12:14 AM, David Roberts wrote: >>> Additional patch attached, is this suitable? >> Looks good, thanks. What's about arithmetics? > Revised patch attached. Hi David, I'm not very excited about this patch. We already have a C backend and MSIL backend. Neither of those support the full generality of LLVM IR (for example, exceptions, 'weird'

Hello, Jeff. > and dereference it. But MSIL is at a higher level, where one simply > uses the callvirt instruction to do a virtual call and no vtable is > supplied or even present. You're right. Consider we will have some FE for MSIL, which will just generate LLVM's "call" instruction with some predefined CC, which will mean "this is virtual call". Backend

Hi Chris, Does that mean that LLVM will be used in the Apple iPhone? >>> Eric On Jan 17, 2007, at 2:11 AM, Chris Lattner wrote: > > I'm happy to announce that Apple is contributing some major > extensions to the LLVM ARM backend. The improvements include support > for ARM v4/v6, vfp support, soft float, pre/postinc support, load/ > store multiple generation,