Displaying 20 results from an estimated 9000 matches similar to: "Opus Compile"
2020 Jun 19
0
Antw: [EXT] Opus Compile
>>> Stefan Knoll <stefancknoll at gmail.com> schrieb am 18.04.2020 um 16:55 in
Nachricht
<11893_1592540904_5EEC3EE7_11893_303_1_CAHXczHmqO3v2et177=XiFe4VeE1iYmmNEFDoKaFO
FeNnDh_zA at mail.gmail.com>:
> Hi.
>
> I am currently failing to cross compile opus.
> I would really appreciate if anyone with gcc experience could put me on the
> right track.
> I am
2017 Aug 02
2
Cross compiling C++ program
Hello,
As a newcomer to the libcxx implementation, I'll probably ask a silly question, but why following example can be compiled natively, but not cross compiled?
#include <cstdlib>
using ::atof;
int main() {
return 0;
}
Native compile: clang++ -o example example.cpp
Cross compile: clang++ -fno-builtin -fno-exceptions -fcheck-new -nostdlib -ffreestanding -target arm-none-eabi
2012 Jul 18
0
[LLVMdev] Setting up a cross-compiler for cortex-m3
On Wed, Jul 18, 2012 at 3:52 PM, Renato Golin <rengolin at systemcall.org> wrote:
> On 18 July 2012 14:33, salvatore benedetto
> <salvatore.benedetto at gmail.com> wrote:
>> but I still haven't figure out how to build for cortex-m3
>>
>> clang -march=armv7-m -mfloat-abi=soft <something missing?> testReference.cpp -c
>
> -march should have done
2013 Oct 15
1
[LLVMdev] Unwanted push/pop on Cortex-M.
Hi andrea,
R11 treated as frame pointer at arm backend , which is fixed again .
Thanks
Umesh
On Tuesday, October 15, 2013, Andrea Mucignat <andrea at nestlabs.com> wrote:
> Umesh,
> Makes some sort of sense to me, OTOH:
> If instead of choosing r11 as a "dummy" to align the stack we had chosen
some other register in the range r0-r7 then we could have emitted the PUSH
2013 Oct 15
0
[LLVMdev] Unwanted push/pop on Cortex-M.
Umesh,
Makes some sort of sense to me, OTOH:
If instead of choosing r11 as a "dummy" to align the stack we had chosen
some other register in the range r0-r7 then we could have emitted the PUSH
encoding T1 (2 bytes opcode) as opposed to the encoding T2 (which is a 4
bytes opcode).
A
On Tue, Oct 15, 2013 at 2:59 AM, Umesh Kalappa <umesh.kalappa0 at gmail.com>wrote:
> Hi
2013 Oct 15
0
[LLVMdev] Unwanted push/pop on Cortex-M.
Hi,
I have this code:
void platform_putchar(int, char);
void out_char( char ch );
void out_char( char ch )
{
platform_putchar (0, ch);
}
I'm compiling with the following clang invocation:
$ /usr/local/vendor/toolchains/llvm/3.3/armv7m/bin/armv7m-none-eabi-clang
-mcpu=cortex-m4 -mfloat-abi=soft -mthumb -nostdinc -ffreestanding
-ffunction-sections -fdata-sections -fno-exceptions
2013 Oct 15
2
[LLVMdev] Unwanted push/pop on Cortex-M.
Hi Andrea,
That is because the LR is the fixed register as per the
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042e/IHI0042E_aapcs.pdf
and out_char() function is not the leaf function ,Hence compiler
tends to save and restore the LR and the save and restore of
register r11 is to align stack for 8 bytes as per ARM EABI.
Thanks
~Umesh
On Tuesday, October 15, 2013, Umesh Kalappa
2019 Nov 13
2
Compiling libc++ using GNU Arm Embedded Toolchain for arm-cortex-m4
Hello,
lately, I have been thinking about how to resolve the problem with that the
program size increases enormously when including <iostream> when compiling
with libstdc++. In this library, in <iostream> there is a static object
__ioinit initialized like so:
...
// For construction of filebuffers for cout, cin, cerr, clog et. al.
static ios_base::Init __ioinit;
...
This
2017 Oct 19
0
Global stack on Cortex-M4
Hi all:
I'm successfully run OPUS in cortexM4 arm architectures using a cross
compiler gcc-arm-none-eabi . I recommend to uses the following precompile
flags before to compile you code:
arm-none-eabi-gcc -mcpu=cortex-m4 -mthumb -mfloat-abi=hard
-mfpu=fpv4-sp-dl16 -std=c99 -fasm -DARM_MATH_CM4 -DOPUS_ARM_INLINE_ASM
-DOPUS_ARM_ASM ....
and in your configuration file of OPUS you could use the
2018 Nov 15
3
[cfe-dev] [RFC][ARM] -Oz implies -mthumb
On Thu, 15 Nov 2018 at 14:18, Sjoerd Meijer <Sjoerd.Meijer at arm.com> wrote:
>
> Ahhh, typo in my previous mail:
>
>
> > when I noticed that -Os gives me Thumb on Cortex-A{8,9,17}
>
>
> I wanted to say:
>
>
> when I noticed that "GCC -Os" gives me Thumb on Cortex-A{8,9,17}
>
>
Yes. Just to clarify my response. That particular linaro
2013 Oct 21
1
[LLVMdev] [PATCH] Unwanted r11 in push/pop on Cortex-M.
To recap, this is what I was trying to solve:
This C code:
int bar(int a, int b, int c, int d, int e, int f);
int foo(int a, int b, int c, int d, int e )
{
int x = 3*a;
return bar3(a,b,c,d,e,x);
}
Produced the following assembly output:
foo:
push {r11, lr}
sub sp, #8
bl bar
add sp, #8
pop {r11, pc}
The part I didn't like is that push/pop become
2017 Oct 31
3
Cross compiling for Baremetal ARM without using GCC
Dear LLVM developers,
Hello,
I'm trying to find a way of cross-compiling my c code against Baremetal Cortex-M device (so target triple will be arm-none-eabi) only using LLVM/Clang, and not using anything from GNU (ld or libc).
I'm doing this to know which one of LLVM/clang and GCC produces smaller flash image size because saving flash is a big deal in our projects.
1) When I just follow
2013 Nov 26
3
[LLVMdev] Targeting ARM Cortex-a9 from x86_64 with clang
Hi, here's the canonical helloworld.c
#include<stdio.h>
int main()
{
printf("Hello World");
return 0;
}
In accordance with the cross-compilation LLVM documentation [1], I am
trying to target the ARM on the Zedboard [2]. It is an ARM Cortex-A9.
The machine I am compiling on is an x86_64 Fedora Linux machine, using
clang 3.3. I am failing to generate an executable,
2013 Nov 27
0
[LLVMdev] Targeting ARM Cortex-a9 from x86_64 with clang
On 11/27/2013 07:57 AM, Rob Stewart wrote:
> On 26 November 2013 16:44, Renato Golin <renato.golin at linaro.org> wrote:
>> On 26 November 2013 15:36, Rob Stewart <robstewart57 at gmail.com> wrote:
>>> $ clang -v -target armv7a-linux-eabi -mcpu=cortex-a9 -mfloat-abi=soft
>>> -mfpu=neon helloworld.c
>> Hi Rod,
> I'm honoured. (But Rob is also OK)
2013 Oct 12
0
[LLVMdev] Generate code for ARM Cortex m0, m3, and m4.
Hi Jan,
For Cortex-M0, you should probably use the armv6m string in the target
triple. For M3 and M4 you need to use the thumbv7m arch string, -mthumb
won't be necessary.
Amara
On 11 October 2013 19:23, Jan Hoogerbrugge <
jan.hoogerbrugge at biface-tools.com> wrote:
> Hi,
>
> I am trying to cross compile code for ARM Cortex m0, m3, and m4.
>
> For m0, I use:
>
>
2009 Jun 29
0
[LLVMdev] configuring cross compiler for Mac to Linux on ARM
Hello,
I am trying to cross compile LLVM.
Build and compile on Mac OS X 10.5.7
Target is an Angstrom Linux Cortex-A8 Beagle board.
I would like to avoid GPLv3.
I can compile. But when I run my executable on Beagle crt0.S is
calling an AngelSWI to
setup the heap and stack. But the AngelSWI seems to just be a stub
because it returns zeros for the pointers. That leads to a segfault.
If I hack in
2013 Nov 27
3
[LLVMdev] Targeting ARM Cortex-a9 from x86_64 with clang
On 26 November 2013 16:44, Renato Golin <renato.golin at linaro.org> wrote:
> On 26 November 2013 15:36, Rob Stewart <robstewart57 at gmail.com> wrote:
>>
>> $ clang -v -target armv7a-linux-eabi -mcpu=cortex-a9 -mfloat-abi=soft
>> -mfpu=neon helloworld.c
>
> Hi Rod,
I'm honoured. (But Rob is also OK) :-)
> You need cross-binutils installed on your
2012 Jul 18
2
[LLVMdev] Setting up a cross-compiler for cortex-m3
On 18 July 2012 14:33, salvatore benedetto
<salvatore.benedetto at gmail.com> wrote:
> but I still haven't figure out how to build for cortex-m3
>
> clang -march=armv7-m -mfloat-abi=soft <something missing?> testReference.cpp -c
-march should have done the trick.
You can also try -mcpu=cortex-m3,
or try -ccc-host-triple armv7m-none-gnueabi (or -eabi),
and possibly
2019 Feb 20
0
Fwd: Custom mode
---------- Forwarded message ---------
From: Peter Svensson <petersvenss85 at gmail.com>
Date: tis 19 feb. 2019 kl 20:43
Subject: Re: [opus] Custom mode
To: Emily Bowman
Hi Emily !
Thank you for responding.
I think my problem is not (yet) with OPUS itself. Encoding at complexity
0 takes 1.6ms ( 4.342ms at complexity 10 !) and decoding takes 1.9ms.
3.5ms, out of my 4.096ms budget, is
2019 Feb 17
2
Custom mode
Hi all !
If someone could give me a hint on how to proceed with the following i'd be
very happy:
I have a test setup on an nrf52832 (Cortex M4) in which I receive audio
from a PDM microphone (64 sample frame) and pass it directly to an I2S
device i.e. from ISR to ISR. With uncompressed audio this works just fine.
Now I try to insert OPUS1.3 in the path but cannot make it work. The