Displaying 20 results from an estimated 500 matches similar to: "[Aarch64 v2 00/18] Patches to enable Aarch64 (version 2)"
2015 Dec 23
6
[AArch64 neon intrinsics v4 0/5] Rework Neon intrinsic code for Aarch64 patchset
Following Tim's comments, here are my reworked patches for the Neon intrinsic function patches of
of my Aarch64 patchset, i.e. replacing patches 5-8 of the v2 series. Patches 1-4 and 9-18 of the
old series still apply unmodified.
The one new (as opposed to changed) patch is the first one in this series, to add named constants
for the ARM architecture variants.
There are also some minor code
2015 Aug 05
8
[PATCH 0/8] Patches for arm64 (aarch64) support
This sequence of patches provides arm64 support for Opus. Tested on
iOS, Android, and Ubuntu 14.04.
The patch sequence was written on top of Viswanath Puttagunta's Ne10
patches, but all but the second ("Reorganize pitch_arm.h") should, I
think, apply independently of it. It does depends on my previous
intrinsics configury reorganization, however.
Comments welcome.
With this and
2015 Nov 07
12
[Aarch64 00/11] Patches to enable Aarch64 (arm64) optimizations, rebased to current master.
Here are my aarch64 patches rebased to the current tip of Opus master.
They're largely the same as my previous patch set, with the addition
of the final one (the Neon fixed-point implementation of
xcorr_kernel). This replaces Viswanath's Neon fixed-point
celt_pitch_xcorr, since xcorr_kernel is used in celt_fir and celt_iir
as well.
These have been tested for correctness under qemu
2016 Aug 23
2
[PATCH 7/8] Update NSQ_LPC_BUF_LENGTH macro.
NSQ_LPC_BUF_LENGTH is independent of DECISION_DELAY.
---
silk/define.h | 4 ----
1 file changed, 4 deletions(-)
diff --git a/silk/define.h b/silk/define.h
index 781cfdc..1286048 100644
--- a/silk/define.h
+++ b/silk/define.h
@@ -173,11 +173,7 @@ extern "C"
#define MAX_MATRIX_SIZE MAX_LPC_ORDER /* Max of LPC Order and LTP order */
-#if( MAX_LPC_ORDER >
2015 Aug 05
0
[PATCH 6/8] Add Neon intrinsics for Silk noise shape quantization.
---
Makefile.am | 8 +++--
silk/NSQ.c | 37 ++++++++--------------
silk/NSQ.h | 70 +++++++++++++++++++++++++++++++++++++++++
silk/arm/NSQ_neon.c | 64 +++++++++++++++++++++++++++++++++++++
silk/arm/NSQ_neon.h | 91 +++++++++++++++++++++++++++++++++++++++++++++++++++++
silk/x86/NSQ_sse.c | 2 +-
silk/x86/main_sse.h | 3 +-
silk_headers.mk | 2 ++
silk_sources.mk
2015 Nov 21
0
[Aarch64 v2 05/18] Add Neon intrinsics for Silk noise shape quantization.
---
Makefile.am | 5 +--
silk/NSQ.c | 37 ++++++++--------------
silk/NSQ.h | 70 +++++++++++++++++++++++++++++++++++++++++
silk/arm/NSQ_neon.c | 64 +++++++++++++++++++++++++++++++++++++
silk/arm/NSQ_neon.h | 91 +++++++++++++++++++++++++++++++++++++++++++++++++++++
silk/x86/NSQ_sse.c | 2 +-
silk/x86/main_sse.h | 3 +-
silk_headers.mk | 2 ++
silk_sources.mk
2016 Jul 14
6
Several patches of ARM NEON optimization
I rebased my previous 3 patches to the current master with minor changes.
Patches 1 to 3 replace all my previous submitted patches.
Patches 4 and 5 are new.
Thanks,
Linfeng Zhang
2015 Aug 05
0
[PATCH 8/8] Apply Neon short prediction optimization to silk_noise_shape_quantizer_del_dec.
---
silk/NSQ_del_dec.c | 37 +++++++++++++------------------------
silk/mips/NSQ_del_dec_mipsr1.h | 3 ++-
2 files changed, 15 insertions(+), 25 deletions(-)
diff --git a/silk/NSQ_del_dec.c b/silk/NSQ_del_dec.c
index aff560c..aaa1fca 100644
--- a/silk/NSQ_del_dec.c
+++ b/silk/NSQ_del_dec.c
@@ -31,6 +31,8 @@ POSSIBILITY OF SUCH DAMAGE.
#include "main.h"
#include
2015 Nov 21
0
[Aarch64 v2 07/18] Apply Neon short prediction optimization to silk_noise_shape_quantizer_del_dec.
---
silk/NSQ_del_dec.c | 37 +++++++++++++------------------------
silk/mips/NSQ_del_dec_mipsr1.h | 3 ++-
2 files changed, 15 insertions(+), 25 deletions(-)
diff --git a/silk/NSQ_del_dec.c b/silk/NSQ_del_dec.c
index aff560c..aaa1fca 100644
--- a/silk/NSQ_del_dec.c
+++ b/silk/NSQ_del_dec.c
@@ -31,6 +31,8 @@ POSSIBILITY OF SUCH DAMAGE.
#include "main.h"
#include
2016 Jul 01
1
silk_warped_autocorrelation_FIX() NEON optimization
Hi all,
I'm sending patch "Optimize silk_warped_autocorrelation_FIX() for ARM NEON" in an separate email.
It is based on Tim’s aarch64v8 branch https://git.xiph.org/?p=users/tterribe/opus.git;a=shortlog;h=refs/heads/aarch64v8
Thanks for your comments.
Linfeng
2015 Aug 05
0
[PATCH 7/8] Add Neon intrinsics for Silk noise shape feedback loop.
---
silk/NSQ.c | 18 ++-------------
silk/NSQ.h | 27 ++++++++++++++++++++++
silk/arm/NSQ_neon.c | 66 +++++++++++++++++++++++++++++++++++++++++++++++++++++
silk/arm/NSQ_neon.h | 10 ++++++++
4 files changed, 105 insertions(+), 16 deletions(-)
diff --git a/silk/NSQ.c b/silk/NSQ.c
index d8513dc..ec81f3b 100644
--- a/silk/NSQ.c
+++ b/silk/NSQ.c
@@ -205,7 +205,7 @@ void
2015 Nov 21
0
[Aarch64 v2 06/18] Add Neon intrinsics for Silk noise shape feedback loop.
---
silk/NSQ.c | 18 ++-------------
silk/NSQ.h | 27 ++++++++++++++++++++++
silk/arm/NSQ_neon.c | 66 +++++++++++++++++++++++++++++++++++++++++++++++++++++
silk/arm/NSQ_neon.h | 10 ++++++++
4 files changed, 105 insertions(+), 16 deletions(-)
diff --git a/silk/NSQ.c b/silk/NSQ.c
index d8513dc..ec81f3b 100644
--- a/silk/NSQ.c
+++ b/silk/NSQ.c
@@ -205,7 +205,7 @@ void
2017 Apr 26
2
2 patches related to silk_biquad_alt() optimization
On Tue, Apr 25, 2017 at 10:31 PM, Jean-Marc Valin <jmvalin at jmvalin.ca>
wrote:
>
> > A_Q28 is split to 2 14-bit (or 16-bit, whatever) integers, to make the
> > multiplication operation within 32-bits. NEON can do 32-bit x 32-bit =
> > 64-bit using 'int64x2_t vmull_s32(int32x2_t a, int32x2_t b)', and it
> > could possibly be faster and less
2017 May 15
2
2 patches related to silk_biquad_alt() optimization
Hi Linfeng,
Sorry for the delay -- I was actually trying to think of the best option
here. For now, my preference would be to keep things bit-exact, but
should there be more similar optimizations relying on 64-bit
multiplication results, then we could consider having a special option
to enable those (even in C).
Cheers,
Jean-Marc
On 08/05/17 12:12 PM, Linfeng Zhang wrote:
> Ping for
2017 Apr 25
2
2 patches related to silk_biquad_alt() optimization
On Mon, Apr 24, 2017 at 5:52 PM, Jean-Marc Valin <jmvalin at jmvalin.ca> wrote:
> On 24/04/17 08:03 PM, Linfeng Zhang wrote:
> > Tested on my chromebook, when stride (channel) == 1, the optimization
> > has no gain compared with C function.
>
> You mean that the Neon code is the same speed as the C code for
> stride==1? This is not terribly surprising for an IIRC
2016 Aug 23
0
[PATCH 8/8] Optimize silk_NSQ_del_dec() for ARM NEON
Created corresponding unit test, and the optimization is bit exact with C
function.
This optimization speeds up SILK encoder on NEON as following.
Fixed-point:
Complexity 0-5: 0%
Complexity 6-7: 6%
Complexity 8-9: 10%
Complexity 10: 8%
Got similar results on floating-point.
---
silk/NSQ_del_dec.c | 6 +-
silk/SigProc_FIX.h | 4
2015 Nov 21
8
[Aarch64 v2 10/18] Clean up some intrinsics-related wording in configure.
---
configure.ac | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/configure.ac b/configure.ac
index f52d2c2..e1a6e9b 100644
--- a/configure.ac
+++ b/configure.ac
@@ -190,7 +190,7 @@ AC_ARG_ENABLE([rtcd],
[enable_rtcd=yes])
AC_ARG_ENABLE([intrinsics],
- [AS_HELP_STRING([--disable-intrinsics], [Disable intrinsics optimizations for ARM(float) X86(fixed)])],,
+
2017 Apr 19
3
[PATCH] cosmetics,silk: correct input/output arg comments
Hi,
Attached is a patch for cosmetics purpose. Please review.
Thanks,
Linfeng Zhang
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.xiph.org/pipermail/opus/attachments/20170419/34354707/attachment.html>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: 0001-cosmetics-silk-correct-input-output-arg-comments.patch
2015 Dec 20
2
[Aarch64 v2 05/18] Add Neon intrinsics for Silk noise shape quantization.
Jonathan Lennox wrote:
> +opus_int32 silk_noise_shape_quantizer_short_prediction_neon(const opus_int32 *buf32, const opus_int32 *coef32)
> +{
> + int32x4_t coef0 = vld1q_s32(coef32);
> + int32x4_t coef1 = vld1q_s32(coef32 + 4);
> + int32x4_t coef2 = vld1q_s32(coef32 + 8);
> + int32x4_t coef3 = vld1q_s32(coef32 + 12);
> +
> + int32x4_t a0 = vld1q_s32(buf32 -
2015 Nov 16
3
[Fast Int64 1/4] Move OPUS_FAST_INT64 definition to celt/arch.h.
---
celt/arch.h | 5 +++++
silk/macros.h | 4 +---
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/celt/arch.h b/celt/arch.h
index 9f74ddd..670527b 100644
--- a/celt/arch.h
+++ b/celt/arch.h
@@ -78,6 +78,11 @@ static OPUS_INLINE void _celt_fatal(const char *str, const char *file, int line)
#define UADD32(a,b) ((a)+(b))
#define USUB32(a,b) ((a)-(b))
+/* Set this if opus_int64