similar to: [PATCH] Add ARM cpu detection for iDevices

On Jan 8, 2015, at 2:33 PM, Tom Hughes <tom at airtime.com<mailto:tom at airtime.com>> wrote: This adds run-time CPU detection for iOS devices. I found this page useful for CPU support and models: http://iossupportmatrix.com/ The patch could be simplified to just set the OPUS_CPU_ARM_NEON flag if you think it's unlikely that anyone would be running on the really old devices that

On Thu, 8 Jan 2015, Jonathan Lennox wrote: > Every armv7 (and armv8) iOS device has supported Neon, and Xcode support for > armv6 was dropped with Xcode 4.5. > > Even if you?re compiling with an old Xcode version to support really old iOS > devices, Apple?s armv6/armv7 selection was a compile-time switch (supported > using fat binaries). ?I think the arch can be detected based

I wrote a proof of concept regarding the cpu capabilities runtime detection and choice of optimized function. I follow design which had been discussed on IRC. Also, i notice a little drawback: we must propagate the arch index through functions which don't have codec state as argument. However, if it's look good, i will continue to implement it. Best regards, -- Aur?lien Zanelli

Dear libvirt experts, I can not instantiate even a simple machine when using the 'vbox' hypervisor: s14% virt-install --connect=vbox:///session --virt-type vbox --name vtest --memory 500 ERROR cannot obtain CPU freq: No such file or directory s14% virsh -c vbox:///session błąd: cannot obtain CPU freq: No such file or directory (1) How to fix this error? The VirtualBox driver seems

Hi, all I want to use LLVM to compile an ARM Cortex-M0 project on windows. Who can send me a sample, including command arguments and introdution about debug process. Thanks a lot. -Steven ***************************** Legal Disclaimer ***************************** "This email may contain confidential and privileged material for the sole use of the intended recipient. Any unauthorized

Targetting the raspberry pi, what triple/flags should I set? I tried triple: armv4t-unknown-linux-gnueabi and ld fails with: a.out uses VFP register arguments if i set hardfloat (using optdata.FloatABIType = FloatABI::Hard), ld fails with an assertion: 2.22 assertion fail ../../bfd/elf32-arm.c:11477 what am I missing?

Many thanks for digging into this, and sorry for my slow reply. Kamil: it sounds like your commit is involved here. Any idea what's happening? Dimitry: If we don't find anyone to debug and fix this before the release, how bad is it for FreeBSD? Can it be worked around downstream if 8.0.0 ships without a fix? Since I'm not entirely sure how supported this functionality is on FreeBSD,

Rui Ueyama <ruiu at google.com> writes: > On Tue, Dec 5, 2017 at 1:22 PM, Rafael Avila de Espindola < > rafael.espindola at gmail.com> wrote: > >> Martin Richtarsky <s at martinien.de> writes: >> >> > Output looks as follows [1] Seems sh_offset is missing? >> >> That is what readelf prints as Off >> >> > [17] .rela.text

It depends, of course, what operating system you have installed on the RPi, but given that it's an ARM1176JZFS (ARMv6) chip, I would expect to see armv6, not armv4t, in the CPU part of the triple. It has a VFP unit, so I'd assume that you'd want to set hardfp (unless you installed an OS that doesn't support hardfp in its standard library), but if ld is complaining then you almost

Jonathan Lennox wrote: > +opus_int32 silk_noise_shape_quantizer_short_prediction_neon(const opus_int32 *buf32, const opus_int32 *coef32) > +{ > + int32x4_t coef0 = vld1q_s32(coef32); > + int32x4_t coef1 = vld1q_s32(coef32 + 4); > + int32x4_t coef2 = vld1q_s32(coef32 + 8); > + int32x4_t coef3 = vld1q_s32(coef32 + 12); > + > + int32x4_t a0 = vld1q_s32(buf32 -

Hi, I'm fairly new at poking around in llvm internals so if you find misconceptions / problems with the below let me know, this is just how I've understood this so far. When doing a build which uses functionality from LinkModules to combine bitcode from different versions of LLVM, or between LLVM-GCC (I know) and Clang, I've noticed that multiple warnings which sometimes seem

Thanks for the clarifications, Bob! I’ve spent some time with the head of the llvm.org repo, and I now understand a lot better what Renato and Tim were talking about re. the architecture aliases. The patch to add v6l, therefore, seems simple enough. I haven’t been able to test it in my usual flow, because that involves the whole swift stack. I’m considering creating a program that links to

Hi all. I’ve been working with Swift on ARMv6 and v7. While working with ARMv6 on linux, I noticed that my arm architecture canonicalization code didn’t produce the expected result. The code that I had been using (within Swift’s Driver.cpp the following: static llvm::Triple computeTargetTriple(StringRef DefaultTargetTriple) { llvm::Triple triple = llvm::Triple(DefaultTargetTriple); //

Hi all, When I use Clang, I can add -mno-thumb to the command line and Clang generates pure Arm code without any use of Thumb instructions. However, I am messing about with the Glasgow Haskell Compiler (GHC) which generates LLVM IR code directly and then calls `opt` and `llc` on that IR code. The generated IR code currently has: target datalayout =

Hi, I was compiling libc++ with a recent TOT (248571) and when I got to the ARMv6, I got a code generation error in memory.cpp: fatal error: error in backend: Cannot select: intrinsic %llvm.arm.clrex ecc: error: clang frontend command failed with exit code 70 (use -v to see invocation) clang version 3.8.0 (trunk) It looks as if the newly added emitAtomicCmpXchgNoStoreLLBalance() function is

On Mon, 18 Sep 2006, [UTF-8] Rafael Esp?ndola wrote: >> "The destination register shall not be the same as the operand >> register Rm. R15 shall not be used as an operand or as the >> destination register." > > The ARM ARM has this "Operand restriction" on MUL: > Specifying the same register for <Rd> and <Rm> has UNPEDICTABLE

On 8 September 2014 23:06, Jonathan Roelofs <jonathan at codesourcery.com> wrote: >> I'm not sure we're on the same page... Your example, and the way that lit >> is currently set up, assumes BUILD and HOST are the same machine. > > or, at least, it assumes that lit is running on HOST. Isn't that the point? So lit can use "qemu-arm arm-linux-gnu-clang

I think we need to think along two dimensions - Breadth of testing and depth of testing 1. Breadth: What the best supported ARM ISA versions in LLVM ARM? Say its armv6 and armv7; We need to - regression test ARM mode, Thumb-2 and Thumb-1 mode (armv6) - Performance/code-size test ARM mode, Thumb-2 and Thumb-1 modes We need to agree on an optimization level for regression as well as

Evan, > I'm the code owner of LLVM codegen and targets. I'm also the one of main developers on the original ARM target. That means, I would make the decisions on major development on ARM target if there are decisions to be made. > > But my role is very different from what people are looking for in this thread. To properly qualify a target like ARM which are supported on many

Hi, I'm trying to compile llvm/clang so that: it is compiled on osx 10.6, it runs on osx, but it outputs win32 objects. More exactly, I'm building an app which generates a .c file that doesn't include or link with anything, and I'd like to be able to make a win32 .dll of it on osx. Below is what I'm getting. Full log is here: http://pastebin.com/KsPGvAfW It fails while