Displaying 20 results from an estimated 500 matches similar to: "QCONST16 cross compile inconsistency"
2015 Nov 16
0
[Fast Int64 2/4] Add OPUS_FAST_INT64 flavors of celt/fixed_generic.h macros.
---
celt/fixed_generic.h | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/celt/fixed_generic.h b/celt/fixed_generic.h
index ac67d37..1cfd6d6 100644
--- a/celt/fixed_generic.h
+++ b/celt/fixed_generic.h
@@ -37,16 +37,32 @@
#define MULT16_16SU(a,b) ((opus_val32)(opus_val16)(a)*(opus_val32)(opus_uint16)(b))
/** 16x32 multiplication, followed by a 16-bit shift right. Results
2013 Dec 09
1
incorrect use of MAX16
Hello,
in celt/celt_encoder.c line 369, the 'b' argument to MAX16
can sometimes be greater than what can be represented by
a 16bit integer. The default definition of MAX16 is type-less,
but I am working on an architecture with hardware support for
min/max of 16bit. Changing the default definition to take
advantage of this hardware changes the result of that
computation.
Please consider
2019 May 27
0
opus-1.3.1 patch for ARM Cortex-M4F (single precision)
The patch prevents KEIL MDK compile warnings, like:
warning: #1035-d: single-precision operand implicitly converted to
double-precision
Actually ARM Cortex-M4F has only a *single precision* (float) FPU.
It's suit for all platforms.
See the comment at the begin of patch file.
Sincerely
Forrest Zhang
-------------- next part --------------
Specify the floating point constant with single
2011 Jun 06
1
QCONST16?
Gents,
In Version 8.1, QCONST16 is defined as follows in arch.h within the
FLOATING_POINT section:
#define QCONST16(x,bits) (x)
However, in both celt.c and quant_bands.c, QCONST16 is referenced without a
conditional FLOATING_POINT define. So when I compile as FIXED_POINT I get an
"undefined identifier" for QCONST16. Am I doing something wrong?
Thx,
MikeH
2009 Jan 14
0
[PATCH] Pitch now quantised at the band level, got rid of all the VQ code.
---
libcelt/Makefile.am | 6 +-
libcelt/bands.c | 26 +++++++++-
libcelt/bands.h | 2 +-
libcelt/celt.c | 23 +++-----
libcelt/pgain_table.h | 133 -------------------------------------------------
libcelt/quant_pitch.c | 117 -------------------------------------------
libcelt/quant_pitch.h | 44 ----------------
7 files changed, 37 insertions(+), 314
2015 Nov 16
3
[Fast Int64 1/4] Move OPUS_FAST_INT64 definition to celt/arch.h.
---
celt/arch.h | 5 +++++
silk/macros.h | 4 +---
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/celt/arch.h b/celt/arch.h
index 9f74ddd..670527b 100644
--- a/celt/arch.h
+++ b/celt/arch.h
@@ -78,6 +78,11 @@ static OPUS_INLINE void _celt_fatal(const char *str, const char *file, int line)
#define UADD32(a,b) ((a)+(b))
#define USUB32(a,b) ((a)-(b))
+/* Set this if opus_int64
2013 May 23
2
ASM runtime detection and optimizations
I wrote a proof of concept regarding the cpu capabilities runtime
detection and choice of optimized function. I follow design which had
been discussed on IRC.
Also, i notice a little drawback: we must propagate the arch index
through functions which don't have codec state as argument.
However, if it's look good, i will continue to implement it.
Best regards,
--
Aur?lien Zanelli
2015 Nov 21
8
[Aarch64 v2 10/18] Clean up some intrinsics-related wording in configure.
---
configure.ac | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/configure.ac b/configure.ac
index f52d2c2..e1a6e9b 100644
--- a/configure.ac
+++ b/configure.ac
@@ -190,7 +190,7 @@ AC_ARG_ENABLE([rtcd],
[enable_rtcd=yes])
AC_ARG_ENABLE([intrinsics],
- [AS_HELP_STRING([--disable-intrinsics], [Disable intrinsics optimizations for ARM(float) X86(fixed)])],,
+
2010 Jan 27
1
Some additions to CELT_RESET_STATE for 0.7.1
Hi Jean-Marc,
As the self-appointed keeper of CELT_RESET_STATE (since I may be the
only one actually using it) I've been kind of lax lately and have only
now tried to reconcile it with the state structures in the 0.7.1 drop. I
think (and feel free to contradict me here) that the following lines
should be added to CELT_RESET_STATE in celt_encoder_ctl:
st->fold_decision = 1;
2007 Jul 05
1
Small bug fixed
Hi,
It is better to replace this line in function filterbank_new:
max_mel = toBARK(EXTRACT16(MULT16_16_Q15(QCONST16(.5f,15),sampling)));
to
max_mel = toBARK(EXTRACT16(sampling/2));
It gives the same but it seems to be faster and avoids overflow on 44100 kHz that prevents denoiser to process 44100 streams. (Yes I know that Speex should not pack 44100 streams but it does now and I use it).
Best
2007 Sep 17
1
Possible fixed point overflow/div 0 preprocess.c
Hi,
I'll try to keep this as brief, yet descriptive enough to save everyone
some time.
If I'm off with this one please forgive me, but it has fixed my issues.
I am not
sure whether it is just my compiler (gcc 3.3.5) doing the wrong thing
with the cast.
File: preprocess.c
Arch affected: x86, (others?)
svn revision: 12778
Description:
The SpeexPreprocessState_ member 'nb_adapt'
2015 Aug 05
0
[PATCH 2/8] Reorganize pitch_arm.h, so RTCD works for intrinsics functions as well.
---
celt/arm/arm_celt_map.c | 24 +++++++++++-
celt/arm/pitch_arm.h | 97 +++++++++++++++++++++++++++++++++----------------
2 files changed, 88 insertions(+), 33 deletions(-)
diff --git a/celt/arm/arm_celt_map.c b/celt/arm/arm_celt_map.c
index 0c9acff..cc6b706 100644
--- a/celt/arm/arm_celt_map.c
+++ b/celt/arm/arm_celt_map.c
@@ -94,9 +94,14 @@ void (*const
2015 Aug 07
0
[PATCH] Silence clang -Wcast-align warnings
---
src/opus_multistream_encoder.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/opus_multistream_encoder.c b/src/opus_multistream_encoder.c
index 6e87337..7163d14 100644
--- a/src/opus_multistream_encoder.c
+++ b/src/opus_multistream_encoder.c
@@ -98,7 +98,8 @@ static opus_val32 *ms_get_preemph_mem(OpusMSEncoder *st)
else
ptr += align(mono_size);
2015 Nov 05
0
AVX Optimizations
Velea, Radu wrote:
> Yes,
>
> Thank you. I'll follow up with the AVX code and tests for pitch code.
Actually, I lied. Because you update opus_select_arch(), you can now
return a value for arch (4) that is larger than the maximum we currently
support (3). This doesn't actually cause failures, because we mask with
OPUS_ARCHMASK, but it does mean that a CPU with AVX will invoke
2015 Aug 05
0
[PATCH 1/8] Move ARM-specific macro overrides to arm-specific file.
---
celt/arm/pitch_arm.h | 19 +++++++++++++++++++
celt/pitch.h | 19 -------------------
2 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/celt/arm/pitch_arm.h b/celt/arm/pitch_arm.h
index d5c9408..fe76f8d 100644
--- a/celt/arm/pitch_arm.h
+++ b/celt/arm/pitch_arm.h
@@ -75,4 +75,23 @@ void celt_pitch_xcorr_float_neon(const opus_val16 *_x, const opus_val16 *_y,
#endif
2015 Dec 08
2
[Aarch64 v2 02/18] Reorganize ARM CPU #ifdefs.
Jonathan Lennox wrote:
> -# if defined(FIXED_POINT)
> +# if defined(FIXED_POINT) && \
> + ((defined(OPUS_ARM_MAY_HAVE_NEON) && !defined(OPUS_ARM_PRESUME_NEON)) || \
> + (defined(OPUS_ARM_MAY_HAVE_MEDIA) && !defined(OPUS_ARM_PRESUME_MEDIA)) || \
> + (defined(OPUS_ARM_MAY_HAVE_EDSP) && !defined(OPUS_ARM_PRESUME_EDSP)))
> opus_val32 (*const
2015 Nov 05
2
AVX Optimizations
Sorry. I missed that. Good observation.
Please go ahead and correct the patch.
Thanks,
Radu
-----Original Message-----
From: opus-bounces at xiph.org [mailto:opus-bounces at xiph.org] On Behalf Of Timothy B. Terriberry
Sent: Thursday, November 5, 2015 11:08 AM
To: opus at xiph.org
Subject: Re: [opus] AVX Optimizations
Velea, Radu wrote:
> Yes,
>
> Thank you. I'll follow up with
2006 Apr 21
2
Major internal changes, TI DSP build change
> The C5x and C6x output diverges in build 10143, which has log message "lpc
> floor converted to fixed-point." Also, the measured SNR changed from 11.05
> in builds 9854-10141 to 9.22 and 9.24 in 10143.
Actually, build 10143 introduced another bug, that was the reason for
the 1.1.11.1 release.
> There is just four lines in modes.c which declare the constant, and one
2015 Mar 13
1
[RFC PATCH v3] Intrinsics/RTCD related fixes. Mostly x86.
From: Jonathan Lennox <jonathan at vidyo.com>
* Makes ?enable-intrinsics work with clang and other non-GCC compilers
* Enables RTCD for the floating-point-mode SSE code in Celt.
* Disables use of RTCD in cases where the compiler targets an instruction set by default.
* Enables the SSE4.1 Silk optimizations that apply to the common parts of Silk when Opus is built in floating-point mode, not
2015 Dec 10
0
[Aarch64 v2 02/18] Reorganize ARM CPU #ifdefs.
> On Dec 8, 2015, at 12:13 PM, Timothy B. Terriberry <tterribe at xiph.org> wrote:
>
> Jonathan Lennox wrote:
>> -# if defined(FIXED_POINT)
>> +# if defined(FIXED_POINT) && \
>> + ((defined(OPUS_ARM_MAY_HAVE_NEON) && !defined(OPUS_ARM_PRESUME_NEON)) || \
>> + (defined(OPUS_ARM_MAY_HAVE_MEDIA) && !defined(OPUS_ARM_PRESUME_MEDIA)) || \