Displaying 20 results from an estimated 10000 matches similar to: "question about libvirt and qemu"
2004 Feb 06
2
vector of factors to POSIXlt
hello,
I have a vector of factors
> str(rcptdt)
Factor w/ 51 levels "1/10/03","1/13/03",..:
> length(rcptdt)
[1] 87
which i want to convert to class POSIXlt to extract the day, so:
a1<-format(rcptdt,"%m/%d/%y")
> length(a1)
[1] 87
and:
a2<-strptime(a1, "%m/%d/%y")
str(a2)
`POSIXlt', format: chr [1:87] "2002-04-18"
2004 Nov 02
2
using R in .NET apps
looking for some thoughts on incorporating R functionality to create
histograms of data stored in an informix db. im gonna write the app in .Net
and will use a managed provider to access the data. what R libs might I have
to package in the assemblies? (sorry my Q is general as Ive only just looked
at wanting this yet)
Thanks. Amer.
2003 Jul 18
2
create a vector looping over a frame
Hello,
I have a data.frame
> names(popA)
[1] "Year" "Series" "Age" "WM" "WF" "HM" "HF" "BM"
[9] "BF" "IM" "IF" "AM" "AF" "Yr"
how do i loop over a subset of variables in this frame to create a vector of
2000 Feb 15
4
Locking error in the installation of Samba
Hi!
I m trying to install samba-2.0.6 on solaris 7.
When i run configure script, it gives me an error
checking configure summary
ERROR: No locking available. Running Samba would be unsafe
configure: error: summary failure. Aborting config
it also doesnot find "fcntl"
What do u ppl suggest. What kind of locking is on my system.
Thanks
Regards
Amer!
2015 Feb 27
4
[LLVMdev] [RFC] AArch64: Should we disable GlobalMerge?
> On Feb 27, 2015, at 2:15 PM, Ahmed Bougacha <ahmed.bougacha at gmail.com> wrote:
>
> On Fri, Feb 27, 2015 at 2:01 PM, Renato Golin <renato.golin at linaro.org> wrote:
>> On 27 February 2015 at 21:26, Ahmed Bougacha <ahmed.bougacha at gmail.com> wrote:
>>> Which brings us to my fallback proposal: what about disabling the
>>> pass on darwin
2015 Feb 27
2
[LLVMdev] [RFC] AArch64: Should we disable GlobalMerge?
On Fri, Feb 27, 2015 at 1:38 PM Ahmed Bougacha <ahmed.bougacha at gmail.com>
wrote:
> On Thu, Feb 26, 2015 at 2:33 AM, Kristof Beyls <kristof.beyls at arm.com>
> wrote:
> >
> > Hi Ahmed,
> >
> > Did you run these experiments on a platform with a linker that makes
> > use of the AArch64CollectLOH-pass-produced information?
>
> As Jim says,
2015 Jan 30
0
[LLVMdev] RFB: Would like to flip the vector shuffle legality flag
I may get one or two in the next month, but not more than that. Focused on
the pass manager for now. If none get there first, I'll eventually circle
back though, so they won't rot forever.
On Jan 30, 2015 11:21 AM, "Ahmed Bougacha" <ahmed.bougacha at gmail.com> wrote:
> I filed a couple more, in case they're actually different issues:
> -
2015 Feb 27
0
[LLVMdev] [RFC] AArch64: Should we disable GlobalMerge?
On Thu, Feb 26, 2015 at 2:33 AM, Kristof Beyls <kristof.beyls at arm.com> wrote:
>
> Hi Ahmed,
>
> Did you run these experiments on a platform with a linker that makes
> use of the AArch64CollectLOH-pass-produced information?
As Jim says, I'm on iOS, so yes. However, I'm mostly running tests
with the pass disabled.
>
> I'm guessing that the
2015 Feb 28
1
[LLVMdev] [RFC] AArch64: Should we disable GlobalMerge?
On Fri, Feb 27, 2015 at 3:51 PM, Eric Christopher <echristo at gmail.com> wrote:
>
>
> On Fri, Feb 27, 2015 at 3:48 PM Ahmed Bougacha <ahmed.bougacha at gmail.com>
> wrote:
>>
>> On Fri, Feb 27, 2015 at 3:13 PM, Quentin Colombet <qcolombet at apple.com>
>> wrote:
>> > To be precise, GlobalMerge is registered as a pre-ISel pass, but still
2015 Feb 27
0
[LLVMdev] [RFC] AArch64: Should we disable GlobalMerge?
On Fri, Feb 27, 2015 at 2:01 PM, Renato Golin <renato.golin at linaro.org> wrote:
> On 27 February 2015 at 21:26, Ahmed Bougacha <ahmed.bougacha at gmail.com> wrote:
>> Which brings us to my fallback proposal: what about disabling the
>> pass on darwin only?
>
> That's a decision for Jim/Evan. I'm ok if they are.
Jim, thoughts?
>
>> As for other
2015 Feb 26
4
[LLVMdev] [RFC] AArch64: Should we disable GlobalMerge?
Hi Ahmed,
Did you run these experiments on a platform with a linker that makes
use of the AArch64CollectLOH-pass-produced information?
I'm guessing that the AArch64CollectLOH-pass information and a linker
that makes use of that information could affect the profitability of
the GlobalMerge pass?
Thanks,
Kristof
> -----Original Message-----
> From: llvmdev-bounces at cs.uiuc.edu
2018 May 22
0
remove rows of a matrix by part of its row name
Hello,
Please always cc the list.
As for the question, yes, it does. If you want to remove just the ones
with exactly 73.1 use the pattern
grep("^73\\.1$", etc)
Explanation:
Beginning of string: ^
End of string: $
Escape special characters: \\ (needed because the period is a special
character.)
Hope this helps,
Rui Barradas
On 5/22/2018 12:50 PM, Ahmed Serag wrote:
> Thank
2015 Jan 30
4
[LLVMdev] RFB: Would like to flip the vector shuffle legality flag
I filed a couple more, in case they're actually different issues:
- http://llvm.org/bugs/show_bug.cgi?id=22412
- http://llvm.org/bugs/show_bug.cgi?id=22413
And that's pretty much it for internal changes. I'm fine with flipping the
switch; Quentin, are you?
Also, just to have an idea, do you (or someone else!) plan to tackle these
in the near future?
-Ahmed
On Thu, Jan 29, 2015 at
2019 Apr 22
2
[Qemu-devel] [RFC 0/3] VirtIO RDMA
On Fri, Apr 19, 2019 at 01:16:06PM +0200, Hannes Reinecke wrote:
> On 4/15/19 12:35 PM, Yuval Shaia wrote:
> > On Thu, Apr 11, 2019 at 07:02:15PM +0200, Cornelia Huck wrote:
> > > On Thu, 11 Apr 2019 14:01:54 +0300
> > > Yuval Shaia <yuval.shaia at oracle.com> wrote:
> > >
> > > > Data center backends use more and more RDMA or RoCE devices and
2019 Apr 22
2
[Qemu-devel] [RFC 0/3] VirtIO RDMA
On Fri, Apr 19, 2019 at 01:16:06PM +0200, Hannes Reinecke wrote:
> On 4/15/19 12:35 PM, Yuval Shaia wrote:
> > On Thu, Apr 11, 2019 at 07:02:15PM +0200, Cornelia Huck wrote:
> > > On Thu, 11 Apr 2019 14:01:54 +0300
> > > Yuval Shaia <yuval.shaia at oracle.com> wrote:
> > >
> > > > Data center backends use more and more RDMA or RoCE devices and
2015 Mar 05
2
[LLVMdev] ReduceLoadWidth, DAGCombiner and non 8bit loads/extloads question.
On Wed, Mar 4, 2015 at 11:43 AM, Ryan Taylor <ryta1203 at gmail.com> wrote:
> Ahmed,
>
> Yes, we do not have an 8 bit type and do not support 8 bit loads/extloads.
>
> For your first post, I imagine that anything that the DAGCombiner does it
> could undo EXCEPT deciding to opt to a type that is not allowed,
No, I think the SelectionDAG legalization should be able to
2017 Aug 07
2
VBROADCAST Implementation Issues
Hello,
I did as you said,
Please tell me whether the following correct now??
def GATHER_256B : I<0x68, MRMSrcMem, (outs VR_2048:$dst, _.KRCWM:$mask_wb),
(VR_2048:$src1, _.KRCWM:$mask, ins i2048mem:$src2),
"GATHER_256B\t{$src2, {$dst}{${mask}}|${dst} {${mask}},
$src2}"),
[(set VR_2048:$dst, _.KRCWM:$mask_wb, (v64i32
(GatherNode
2017 Aug 06
2
VBROADCAST Implementation Issues
i want to implement gather for v64i32. i wrote following code.
def GATHER_256B : I<0x68, MRMSrcMem, (outs VR_2048:$dst), (ins
i2048mem:$src),
"GATHER_256B\t{$src, $dst|$dst, $src}",
[(set VR_2048:$dst, (v64i32 (masked_gather
addr:$src)))],
IIC_MOV_MEM>, TA;
def: Pat<(v64f32 (masked_gather addr:$src)), (GATHER_256B
2016 Jun 14
2
llvm intrinsics/libc/libm question
If I do
T.getArch() == xxx
TLI.setUnavailable(LibFunc::copysign)
then this works at generating a call instead of not being able to select
the ISD::FCOPYSIGN, but I don't know why I don't need to do this for other
LibFunc functions (such as floor, etc... these generate call just fine)?
Thanks,
Ryan
On Tue, Jun 14, 2016 at 11:58 AM, Ryan Taylor <ryta1203 at gmail.com> wrote:
2015 Feb 27
3
[LLVMdev] [RFC] AArch64: Should we disable GlobalMerge?
On 27 February 2015 at 21:26, Ahmed Bougacha <ahmed.bougacha at gmail.com> wrote:
> Which brings us to my fallback proposal: what about disabling the
> pass on darwin only?
That's a decision for Jim/Evan. I'm ok if they are.
> As for other targets, as a first step, making the pass run under -O3
> rather than -O1 is hopefully agreeable to everyone?
Sounds reasonable.