similar to: [PATCH] virtio_pci: properly clean up MSI-X state when initialization fails

Hi Michael, On Mon, Sep 15, 2014 at 1:32 AM, Michael S. Tsirkin <mst at redhat.com> wrote: > On Sun, Sep 14, 2014 at 08:23:26PM -0700, Anthony Liguori wrote: >> From: Anthony Liguori <aliguori at amazon.com> >> >> If MSI-X initialization fails after setting msix_enabled = 1, then >> the device is left in an inconsistent state. This would normally >>

Hi Michael, On Mon, Sep 15, 2014 at 1:32 AM, Michael S. Tsirkin <mst at redhat.com> wrote: > On Sun, Sep 14, 2014 at 08:23:26PM -0700, Anthony Liguori wrote: >> From: Anthony Liguori <aliguori at amazon.com> >> >> If MSI-X initialization fails after setting msix_enabled = 1, then >> the device is left in an inconsistent state. This would normally >>

Hi Michael, this series contains a couple cleanups for the virtio_pci interrupt handling code, including a switch to the new pci_irq_alloc_vectors helper. All these are in preparation of taking advantage of the new PCI layer / core IRQ interrupt affinity handling, for which I will send out a series once this and some core interrupt handling changes are in.

Hi Michael, this series contains a couple cleanups for the virtio_pci interrupt handling code, including a switch to the new pci_irq_alloc_vectors helper. All these are in preparation of taking advantage of the new PCI layer / core IRQ interrupt affinity handling, for which I will send out a series once this and some core interrupt handling changes are in.

From: Andrew Vagin <avagin at openvz.org> vp_dev->msix_vectors should be initialized before allocating msix_affinity_masks, otherwise vp_free_vectors will not free these objects. unreferenced object 0xffff88010f969d88 (size 512): comm "systemd-udevd", pid 158, jiffies 4294673645 (age 80.545s) hex dump (first 32 bytes): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

From: Andrew Vagin <avagin at openvz.org> vp_dev->msix_vectors should be initialized before allocating msix_affinity_masks, otherwise vp_free_vectors will not free these objects. unreferenced object 0xffff88010f969d88 (size 512): comm "systemd-udevd", pid 158, jiffies 4294673645 (age 80.545s) hex dump (first 32 bytes): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

vp_dev->msix_vectors should be initialized before allocating msix_affinity_masks, otherwise vp_free_vectors will not free these objects. unreferenced object 0xffff88010f969d88 (size 512): comm "systemd-udevd", pid 158, jiffies 4294673645 (age 80.545s) hex dump (first 32 bytes): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 00 00 00 00 00 00 00 00 00 00

vp_dev->msix_vectors should be initialized before allocating msix_affinity_masks, otherwise vp_free_vectors will not free these objects. unreferenced object 0xffff88010f969d88 (size 512): comm "systemd-udevd", pid 158, jiffies 4294673645 (age 80.545s) hex dump (first 32 bytes): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 00 00 00 00 00 00 00 00 00 00

One VM only has 128 msix interrupt, virtio-config interrupt has less workload. This patch shares one normal interrupt for configuration between virtio devices. Signed-off-by: Amos Kong <akong at redhat.com> --- drivers/virtio/virtio_pci.c | 41 ++++++++++++++++------------------------- 1 file changed, 16 insertions(+), 25 deletions(-) diff --git a/drivers/virtio/virtio_pci.c

One VM only has 128 msix interrupt, virtio-config interrupt has less workload. This patch shares one normal interrupt for configuration between virtio devices. Signed-off-by: Amos Kong <akong at redhat.com> --- drivers/virtio/virtio_pci.c | 41 ++++++++++++++++------------------------- 1 file changed, 16 insertions(+), 25 deletions(-) diff --git a/drivers/virtio/virtio_pci.c

Hi Michael, this series contains a couple cleanups for the virtio_pci interrupt handling code, including a switch to the new pci_irq_alloc_vectors helper, and support for automatic affinity by the PCI layer if the consumers ask for it. It then converts over virtio_blk to use this functionality so that it's blk-mq queues are aligned to the MSI-X vector routing. I have a similar patch in the

Hi Michael, this series contains a couple cleanups for the virtio_pci interrupt handling code, including a switch to the new pci_irq_alloc_vectors helper, and support for automatic affinity by the PCI layer if the consumers ask for it. It then converts over virtio_blk to use this functionality so that it's blk-mq queues are aligned to the MSI-X vector routing. I have a similar patch in the

Here's the patch series I ended up with. I haven't coded up the QEMU side yet, so no idea if the new driver works. Questions: (1) Do we win from separating ISR, NOTIFY and COMMON? (2) I used a "u8 bar"; should I use a bir and pack it instead? BIR seems a little obscure (noone else in the kernel source seems to refer to it). Cheers, Rusty.

Here's the patch series I ended up with. I haven't coded up the QEMU side yet, so no idea if the new driver works. Questions: (1) Do we win from separating ISR, NOTIFY and COMMON? (2) I used a "u8 bar"; should I use a bir and pack it instead? BIR seems a little obscure (noone else in the kernel source seems to refer to it). Cheers, Rusty.

On Mon, Sep 01, 2014 at 09:37:30AM +0300, Michael S. Tsirkin wrote: > Hi Michael, > On Mon, Sep 01, 2014 at 01:41:54PM +0800, Amos Kong wrote: > > One VM only has 128 msix interrupt, virtio-config interrupt > > has less workload. This patch shares one normal interrupt Thanks for your quick reply. > normal == INT#x? Please don't call it normal. The proper name is >

On Mon, Sep 01, 2014 at 09:37:30AM +0300, Michael S. Tsirkin wrote: > Hi Michael, > On Mon, Sep 01, 2014 at 01:41:54PM +0800, Amos Kong wrote: > > One VM only has 128 msix interrupt, virtio-config interrupt > > has less workload. This patch shares one normal interrupt Thanks for your quick reply. > normal == INT#x? Please don't call it normal. The proper name is >

Hi all: This series try to share MSIX irq for each tx/rx queue pair. This is done through: - introducing virtio pci channel which are group of virtqueues that sharing a single MSIX irq (Patch 1) - expose channel setting to virtio core api (Patch 2) - try to use channel setting in virtio-net (Patch 3) For the transport that does not support channel, channel paramters were simply ignored. For

Hi all: This series try to share MSIX irq for each tx/rx queue pair. This is done through: - introducing virtio pci channel which are group of virtqueues that sharing a single MSIX irq (Patch 1) - expose channel setting to virtio core api (Patch 2) - try to use channel setting in virtio-net (Patch 3) For the transport that does not support channel, channel paramters were simply ignored. For

I've renewed this again, with some comments from HPA. I've tried to keep the new patches separate, so you can see the changes since we last discussed this (and so it's easy to back it out if we decide it's insane). I haven't even looked at the QEMU side so this is completely untested. Comments gratefully received! Rusty. Michael S Tsirkin (1): pci: add pci_iomap_range

I've renewed this again, with some comments from HPA. I've tried to keep the new patches separate, so you can see the changes since we last discussed this (and so it's easy to back it out if we decide it's insane). I haven't even looked at the QEMU side so this is completely untested. Comments gratefully received! Rusty. Michael S Tsirkin (1): pci: add pci_iomap_range