similar to: [PATCH v2 0/7] Enable Drivers for Intel MIC X100 Coprocessors.

ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)

ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)

ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)

ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)

An Intel MIC X100 device is a PCIe form factor add-in coprocessor card based on the Intel Many Integrated Core (MIC) architecture that runs a Linux OS. It is a PCIe endpoint in a platform and therefore implements the three required standard address spaces i.e. configuration, memory and I/O. The host OS loads a device driver as is typical for PCIe devices. The card itself runs a bootstrap after

An Intel MIC X100 device is a PCIe form factor add-in coprocessor card based on the Intel Many Integrated Core (MIC) architecture that runs a Linux OS. It is a PCIe endpoint in a platform and therefore implements the three required standard address spaces i.e. configuration, memory and I/O. The host OS loads a device driver as is typical for PCIe devices. The card itself runs a bootstrap after

These patches fix various issues which were reported or found with the MIC driver. Changelog ========= v2 => v3: * Reorder patch 5 in v2 to patch 4 in v3. * Split patch 4 in v2 into patches 5 and 6 in v3. v1 => v2: @ https://lkml.org/lkml/2013/11/26/376 * Address review comments @ https://lkml.org/lkml/2013/11/26/443 in patch 5. v1: Initial post @ https://lkml.org/lkml/2013/11/26/321

These patches fix various issues which were reported or found with the MIC driver. Changelog ========= v2 => v3: * Reorder patch 5 in v2 to patch 4 in v3. * Split patch 4 in v2 into patches 5 and 6 in v3. v1 => v2: @ https://lkml.org/lkml/2013/11/26/376 * Address review comments @ https://lkml.org/lkml/2013/11/26/443 in patch 5. v1: Initial post @ https://lkml.org/lkml/2013/11/26/321

These patches fix various issues which were reported or found with the MIC driver. Ashutosh Dixit (3): misc: mic: Bug fix for sysfs poll usage. misc: mic: Fix sparse warnings and other endianness issues. misc: mic: Fix user space namespace pollution from mic_common.h. Sudeep Dutt (2): misc: mic: Change mic_notify(...) to return true. misc: mic: Minor bug fix in 'retry' loops.

These patches fix various issues which were reported or found with the MIC driver. Ashutosh Dixit (3): misc: mic: Bug fix for sysfs poll usage. misc: mic: Fix sparse warnings and other endianness issues. misc: mic: Fix user space namespace pollution from mic_common.h. Sudeep Dutt (2): misc: mic: Change mic_notify(...) to return true. misc: mic: Minor bug fix in 'retry' loops.

On Wed, Aug 07, 2013 at 08:04:13PM -0700, Sudeep Dutt wrote: > From: Caz Yokoyama <Caz.Yokoyama at intel.com> > > This patch introduces a sample user space daemon which > implements the virtio device backends on the host. The daemon > creates/removes/configures virtio device backends by communicating with > the Intel MIC Host Driver. The virtio devices currently supported

On Wed, Aug 07, 2013 at 08:04:13PM -0700, Sudeep Dutt wrote: > From: Caz Yokoyama <Caz.Yokoyama at intel.com> > > This patch introduces a sample user space daemon which > implements the virtio device backends on the host. The daemon > creates/removes/configures virtio device backends by communicating with > the Intel MIC Host Driver. The virtio devices currently supported

Endianness issues are now consistent as per the documentation in host/mic_virtio.h. Note that the host can be both BE or LE whereas the card is always LE. Memory space sparse warnings are fixed for now by using __force. This is sufficient for now since the driver depends on x86 but will need to be revisited if we support other architectures which treat I/O memory differently from system memory.

Endianness issues are now consistent as per the documentation in host/mic_virtio.h. Note that the host can be both BE or LE whereas the card is always LE. Memory space sparse warnings are fixed for now by using __force. This is sufficient for now since the driver depends on x86 but will need to be revisited if we support other architectures which treat I/O memory differently from system memory.

On Wed, Aug 07, 2013 at 08:04:07PM -0700, Sudeep Dutt wrote: > +/** > + * struct mic_device - MIC device information for each card. > + * > + * @name: Unique name for this MIC device. > + * @mmio: MMIO bar information. > + * @pdev: The PCI device structure. > + * @family: The MIC family to which this device belongs. > + * @ops: MIC HW specific operations. > + * @id: The

On Wed, Aug 07, 2013 at 08:04:07PM -0700, Sudeep Dutt wrote: > +/** > + * struct mic_device - MIC device information for each card. > + * > + * @name: Unique name for this MIC device. > + * @mmio: MMIO bar information. > + * @pdev: The PCI device structure. > + * @family: The MIC family to which this device belongs. > + * @ops: MIC HW specific operations. > + * @id: The

On Tue, 2013-08-13 at 14:43 +0200, Pavel Machek wrote: > Hi! > > > Since it is a PCIe card, it does not have the ability to host hardware > > devices for networking, storage and console. We provide these devices > > on X100 coprocessors thus enabling a self-bootable equivalent environment > > for applications. A key benefit of our solution is that it leverages >

On Tue, 2013-08-13 at 14:43 +0200, Pavel Machek wrote: > Hi! > > > Since it is a PCIe card, it does not have the ability to host hardware > > devices for networking, storage and console. We provide these devices > > on X100 coprocessors thus enabling a self-bootable equivalent environment > > for applications. A key benefit of our solution is that it leverages >

From: Caz Yokoyama <Caz.Yokoyama at intel.com> This patch introduces a sample user space daemon which implements the virtio device backends on the host. The daemon creates/removes/configures virtio device backends by communicating with the Intel MIC Host Driver. The virtio devices currently supported are virtio net, virtio console and virtio block. Virtio net supports TSO/GSO. The daemon

From: Ashutosh Dixit <ashutosh.dixit at intel.com> This patch introduces the host "Virtio over PCIe" interface for Intel MIC. It allows creating user space backends on the host and instantiating virtio devices for them on the Intel MIC card. A character device per MIC is exposed with IOCTL, mmap and poll callbacks. This allows the user space backend to: (a) add/remove a virtio