similar to: [PATCH] drm: sgdma: free allocated memory if TT init fails

We get this patch every few months... How about one that instead adds a comment which explains why this kfree isn't needed :) [I'm leaving the reason to the reader, which will force you to glance at the ttm code.] On Wed, Dec 10, 2014 at 1:37 PM, Alexandre Courbot <acourbot at nvidia.com> wrote: > When ttm_dma_tt_init() fails in nouveau_sgdma_create_ttm(), we should > free the

Common programming sense dictates that resources allocated by a function are freed by this function should it fails, but this is not the case for the allocated structure of nouveau_sgdma_create_ttm(). It seems that n00b contributors attempt to fix this one like bugs flying towards a bug zapper, so add a comment to hopefully prevent this from happening anymore. Signed-off-by: Alexandre Courbot

nouveau_sgdma_be::dev is only set once during init and never used anywhere, so remove it. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drm/nouveau_sgdma.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drm/nouveau_sgdma.c b/drm/nouveau_sgdma.c index 01707e7deaf5..ec76c0b4e452 100644 --- a/drm/nouveau_sgdma.c +++ b/drm/nouveau_sgdma.c @@ -9,7 +9,6 @@ struct

On Fri, Jan 29, 2010 at 12:00:49PM +0300, Dan Carpenter wrote: > These bugs are when code dereferences a variable and then checks that it is not null. > The new thing is that I wrote a shell script to try remove the false positives caused > by macros. There are still some false positives because smatch is bad at handling > loops and knowing when a container got redefined. > >

On 12/11/2014 03:47 AM, Ilia Mirkin wrote: > We get this patch every few months... How about one that instead adds > a comment which explains why this kfree isn't needed :) [I'm leaving > the reason to the reader, which will force you to glance at the ttm > code.] ttm_dma_tt_init -> ttm_tt_destroy -> nouveau_sgdma_destroy -> kfree Urrk. I'm definitely not a fan

The ttm_backend_func structures are never modified, so declare them as const. Done with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall at lip6.fr> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 +- drivers/gpu/drm/ast/ast_ttm.c | 2 +- drivers/gpu/drm/bochs/bochs_mm.c | 2 +- drivers/gpu/drm/cirrus/cirrus_ttm.c | 2 +-

The ttm_backend_func structures are never modified, so declare them as const. Done with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall at lip6.fr> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 +- drivers/gpu/drm/ast/ast_ttm.c | 2 +- drivers/gpu/drm/bochs/bochs_mm.c | 2 +- drivers/gpu/drm/cirrus/cirrus_ttm.c | 2 +-

On Sun, 2013-08-11 at 17:06 +1000, Benjamin Herrenschmidt wrote: > I think I found at least two cases where "12" was used where it should > have been PAGE_SHIFT (basically ttm_mem_reg->num_pages). This > is only the tip of the iceberg, so this isn't a formal patch submission, > but I would appreciate your thought as to whether the below is correct > (and thus

On Thu, 2013-08-29 at 16:49 +1000, Ben Skeggs wrote: > > Additionally the current code is broken in that the upper layer in > > vm/base.c doesn't increment "pte" by the right amount. > > > > Now, if those two assertions can be made always true: > > > > - Those two functions (map_sg and map_sg_table) never deal with the > > "big"

On Sun, 2013-08-11 at 11:02 +0200, Maarten Lankhorst wrote: > > diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c > > index 5c7433d..c314a5f 100644 > > --- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c > > +++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c > > @@ -190,8 +190,8 @@

This patch enlarges the PCI GART aperture to 512 MB. The current 64MB aperture is too small and should be enlarged. The optimal amound may be card/system-dependent, so a more sophisticated approach may be preferable. In particular, if RAMIN is less than 1MB, a 512MB aperture won't fit. Signed-off-by: Luca Barbieri <luca at luca-barbieri.com> --- drivers/gpu/drm/nouveau/nouveau_sgdma.c

Op 11-08-13 07:36, Benjamin Herrenschmidt schreef: > On Sun, 2013-08-11 at 10:41 +1000, Benjamin Herrenschmidt wrote: >> Now, to do that, I need a better understanding of the various things >> in there since I'm not familiar with nouveau at all. What I think I've >> figured out is with a few questions, it would be awesome if you could >> answer them so I can have

On Sun, 2013-08-11 at 08:17 +0200, Maarten Lankhorst wrote: > > So I'm still a bit confused :-) > > > The fun has been doubled because TTM expects PAGE units, so some of > the PAGE_SHIFT's are > genuine. Some may be a result of PAGE_SHIFT == 12, so honestly I don't > know the specific ones. Right, and the other way around too :-) I think I found at least two

Op 11-08-13 10:04, Benjamin Herrenschmidt schreef: > On Sun, 2013-08-11 at 17:06 +1000, Benjamin Herrenschmidt wrote: > >> I think I found at least two cases where "12" was used where it should >> have been PAGE_SHIFT (basically ttm_mem_reg->num_pages). This >> is only the tip of the iceberg, so this isn't a formal patch submission, >> but I would

On Fri, Nov 29, 2013 at 4:01 PM, Benjamin Herrenschmidt <benh at kernel.crashing.org> wrote: > On Thu, 2013-08-29 at 16:49 +1000, Ben Skeggs wrote: > >> > Additionally the current code is broken in that the upper layer in >> > vm/base.c doesn't increment "pte" by the right amount. >> > >> > Now, if those two assertions can be made

On Sun, Aug 11, 2013 at 7:35 PM, Benjamin Herrenschmidt <benh at kernel.crashing.org> wrote: > On Sun, 2013-08-11 at 11:02 +0200, Maarten Lankhorst wrote: > >> > diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c >> > index 5c7433d..c314a5f 100644 >> > ---

Currently, we take down the sgdma engine without evicting all buffers from VRAM. The TTM device release will try to evict anything in VRAM to GART memory, but this will fail since sgdma has already been taken down. This causes an infinite loop in kernel mode on module unload. It usually doesn't happen because there aren't any buffer on close. However, if the GPU is locked up, this

On Mon, May 19, 2014 at 04:10:57PM +0900, Alexandre Courbot wrote: > From: Lucas Stach <dev at lynxeye.de> > > Signed-off-by: Lucas Stach <dev at lynxeye.de> > [acourbot at nvidia.com: make conditional and platform-friendly] > Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> Perhaps having a propery commit message here would be good. > diff --git

Changes in v2: - Compute size based on ramin_rsvd_size This patch enlarges the PCI GART aperture to 512 MB, or the space covered by a DMA object filling half RAMIN. The current 64MB aperture is too small and should be enlarged. The optimal amound may be card/system-dependent, so a more sophisticated approach may be preferable. Could anyone with an nv04 test whether this doesn't break there?

It has been a couple of months since v4 - apologies for this. v4 has not received many comments, but this version addresses them and makes a new attempt at pushing the critical bit for GK20A and Nouveau on ARM in general. As a reminder, this series addresses the memory coherency issue that we are seeing on ARM platforms. Contrary to x86 which invalidates the PCI caches whenever a write is made by