similar to: [RESEND V2 PATCH 1/3] soc/tegra: fuse: export tegra_sku_info for module use

Some Tegra drivers might be compiled as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> Acked-by: Alexandre Courbot <acourbot at nvidia.com> Acked-by: Thierry Reding <treding

Some Tegra drivers might be compiled as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> Acked-by: Alexandre Courbot <acourbot at nvidia.com> Acked-by: Thierry Reding <treding

Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- nvkm/subdev/volt/base.c | 67 ++++++++++++++++++++++++++++--------------------- 1 file changed, 38 insertions(+), 29 deletions(-) diff --git a/nvkm/subdev/volt/base.c b/nvkm/subdev/volt/base.c index 32794a999106..26ccd8df193f 100644 --- a/nvkm/subdev/volt/base.c +++ b/nvkm/subdev/volt/base.c @@ -101,6 +101,41 @@ nouveau_volt_set_id(struct

Hello Vince, One minor question inline. Op 28-11-14 om 12:13 schreef Vince Hsu: > The voltage value are calculated by the hardware characterized > result. > > Signed-off-by: Vince Hsu <vinceh at nvidia.com> > --- > > Resend this patch with the fuse change and proper patch prefix > per Thierry's request. > > drm/Kbuild | 1 + >

The voltage value are calculated by the hardware characterized result. Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- Hi, The tegra_sku_info needs to be exported from Tegra fuse driver. I've sent the patch to the linux-tegra mailing list. Just FYI. Thanks, Vince drm/Kbuild | 1 + drm/core/subdev/volt/gk20a.c | 1 + nvkm/engine/device/nve0.c | 1 +

This series adds support for GM20B PLL's Maxwell features, namely glitchless switch and (more importantly) DFS support. DFS lets the PLL lower its output speed according to input current variations, making the clock more stable and allowing it to run safely at lower voltage. All GM20B additions are done in the last patch, which consequently ends up being considerably big ; fortunately, it

The voltage value are calculated by the hardware characterized result. Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- Resend this patch with the fuse change and proper patch prefix per Thierry's request. drm/Kbuild | 1 + drm/core/subdev/volt/gk20a.c | 1 + nvkm/engine/device/nve0.c | 1 + nvkm/include/subdev/volt.h | 1 + nvkm/subdev/clock/gk20a.c

Hi Roy, On 11/28/2014 07:25 PM, Roy Spliet wrote: > Hello Vince, > > One minor question inline. > > Op 28-11-14 om 12:13 schreef Vince Hsu: >> The voltage value are calculated by the hardware characterized >> result. >> >> Signed-off-by: Vince Hsu <vinceh at nvidia.com> >> --- >> >> Resend this patch with the fuse change and proper

Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c:49: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c:62: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer

Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c:49: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c:62: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer

This series does some refactoring in the GK20A's volt and clk drivers (fixing a few things while we are at it) to let GM20B benefit from the GK20A's logic with which it is compatible. GM20B is capable of more sophisticated (and power-efficient) reclocking which will follow later. Even after this more fancy reclocking is merged, the present logic will remain used in the lowest speedo of

Change kernel-doc "/**" comments to common "/*" comments to prevent kernel-doc warnings: crtc.c:453: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Sets up registers for the given mode/adjusted_mode pair. crtc.c:453: warning: missing initial short description on line: * Sets up registers for

This set is part of a larger effort attempting to clean-up W=1 kernel builds, which are currently overwhelmingly riddled with niggly little warnings. Lee Jones (15): drm/xlnx/zynqmp_disp: Use correct kerneldoc formatting in zynqmp_disp drm/xlnx/zynqmp_dp: Fix function name zynqmp_dp_link_train() -> zynqmp_dp_train() drm/vkms/vkms_composer: Fix a few different kerneldoc formatting

This set is part of a larger effort attempting to clean-up W=1 kernel builds, which are currently overwhelmingly riddled with niggly little warnings. Cc: Alex Deucher <alexander.deucher at amd.com> Cc: amd-gfx at lists.freedesktop.org Cc: Ben Skeggs <bskeggs at redhat.com> Cc: "Christian K?nig" <christian.koenig at amd.com> Cc: Daniel Vetter <daniel at ffwll.ch>

Hello Vince, Op 28-11-14 om 12:57 schreef Vince Hsu: > Hi Roy, > > On 11/28/2014 07:25 PM, Roy Spliet wrote: >> Hello Vince, >> >> One minor question inline. >> >> Op 28-11-14 om 12:13 schreef Vince Hsu: >>> The voltage value are calculated by the hardware characterized >>> result. >>> >>> Signed-off-by: Vince Hsu

We are slowly getting there! v4 of the series with some realy good improvements, so I am sure this is like 95% done and only needs some proper polishing and proper Reviews! I also added the NvVoltOffsetmV module parameter, so that a user is able to over and !under!-volt the GPU. Overvolting makes sense, when there are still some reclocking issues left, which might be solved by a higher voltage.

I've splitted my big series between the part which actually fixes the engine reclocking bits and the part handling voltage/clock updates on temperature change, so that the more reviewed parts can be merged in faster. This series fixes a lot of Engine reclocking issues found on Fermi, Kepler and all Maxwell generation GPUs. It does _not_ fix memory reclocking on Fermi. It mostly contains of

this series solves different issues we encounter on kepler cards while reclocking: 1. core clock doesn't change at all and produces a volting error (patch 1) this can happen when the voltage table has only 0ed values in the header so we have to parse the entries itself, which contain the right voltages 2. kepler won't clock to highest cstates (patch 2) this happens, because there are

This series contains a lot of groundwork to finally fix reclocking issues on Kepler+ gpus. There shouldn't be any functional changes with the first patch being the only exception (fixes some voltage table parsing issues with of few kepler gpus) The most interessting thing is the tool in the last patch, which can be ran alongside the nvidia driver to test nouveaus volting code and print the

this series solves different issues we encounter on kepler cards while reclocking: 1. core clock doesn't change at all and produces a volting error (patch 1) this can happen when the voltage table has only 0ed values in the header so we have to parse the entries itself, which contain the right voltages 2. kepler won't clock to highest cstates (patch 2) this happens, because there are