similar to: [PATCH 1/2] volt: allow non-bios voltage scaling

Some Tegra drivers might be complied as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- v2: add more description why we need this patch drivers/soc/tegra/fuse/fuse-tegra.c | 1

Some Tegra drivers might be compiled as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> Acked-by: Alexandre Courbot <acourbot at nvidia.com> Acked-by: Thierry Reding <treding

Some Tegra drivers might be compiled as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> Acked-by: Alexandre Courbot <acourbot at nvidia.com> Acked-by: Thierry Reding <treding

Hello Vince, One minor question inline. Op 28-11-14 om 12:13 schreef Vince Hsu: > The voltage value are calculated by the hardware characterized > result. > > Signed-off-by: Vince Hsu <vinceh at nvidia.com> > --- > > Resend this patch with the fuse change and proper patch prefix > per Thierry's request. > > drm/Kbuild | 1 + >

Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- Resend this patch with the fuse change and proper patch prefix per Thierry's request. nvkm/subdev/volt/base.c | 67 ++++++++++++++++++++++++++++--------------------- 1 file changed, 38 insertions(+), 29 deletions(-) diff --git a/nvkm/subdev/volt/base.c b/nvkm/subdev/volt/base.c index 32794a999106..26ccd8df193f 100644 ---

The voltage value are calculated by the hardware characterized result. Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- Hi, The tegra_sku_info needs to be exported from Tegra fuse driver. I've sent the patch to the linux-tegra mailing list. Just FYI. Thanks, Vince drm/Kbuild | 1 + drm/core/subdev/volt/gk20a.c | 1 + nvkm/engine/device/nve0.c | 1 +

The voltage value are calculated by the hardware characterized result. Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- Resend this patch with the fuse change and proper patch prefix per Thierry's request. drm/Kbuild | 1 + drm/core/subdev/volt/gk20a.c | 1 + nvkm/engine/device/nve0.c | 1 + nvkm/include/subdev/volt.h | 1 + nvkm/subdev/clock/gk20a.c

Hi Roy, On 11/28/2014 07:25 PM, Roy Spliet wrote: > Hello Vince, > > One minor question inline. > > Op 28-11-14 om 12:13 schreef Vince Hsu: >> The voltage value are calculated by the hardware characterized >> result. >> >> Signed-off-by: Vince Hsu <vinceh at nvidia.com> >> --- >> >> Resend this patch with the fuse change and proper

there is a field in the voltage table which tells us if the VIDs are taken from the entries or calculated through the header v2: don't break older versions of the table Signed-off-by: Karol Herbst <nouveau at karolherbst.de> --- drm/nouveau/include/nvkm/subdev/bios/volt.h | 5 +-- drm/nouveau/nvkm/subdev/bios/volt.c | 47 ++++++++++++++++-------------

This series adds support for GM20B PLL's Maxwell features, namely glitchless switch and (more importantly) DFS support. DFS lets the PLL lower its output speed according to input current variations, making the clock more stable and allowing it to run safely at lower voltage. All GM20B additions are done in the last patch, which consequently ends up being considerably big ; fortunately, it

info.min and info.max doesn't always represent the actual voltage range we can use. Do the same as with the entry based volting. Fixes "ERROR: Can't get value of subfeature in0_min: Can't read" errors in sensors. Signed-off-by: Karol Herbst <karolherbst at gmail.com> --- drm/nouveau/nvkm/subdev/volt/base.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)

Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c:49: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c:62: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer

Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c:49: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c:62: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer

Change kernel-doc "/**" comments to common "/*" comments to prevent kernel-doc warnings: crtc.c:453: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Sets up registers for the given mode/adjusted_mode pair. crtc.c:453: warning: missing initial short description on line: * Sets up registers for

We are slowly getting there! v4 of the series with some realy good improvements, so I am sure this is like 95% done and only needs some proper polishing and proper Reviews! I also added the NvVoltOffsetmV module parameter, so that a user is able to over and !under!-volt the GPU. Overvolting makes sense, when there are still some reclocking issues left, which might be solved by a higher voltage.

This series does some refactoring in the GK20A's volt and clk drivers (fixing a few things while we are at it) to let GM20B benefit from the GK20A's logic with which it is compatible. GM20B is capable of more sophisticated (and power-efficient) reclocking which will follow later. Even after this more fancy reclocking is merged, the present logic will remain used in the lowest speedo of

this series solves different issues we encounter on kepler cards while reclocking: 1. core clock doesn't change at all and produces a volting error (patch 1) this can happen when the voltage table has only 0ed values in the header so we have to parse the entries itself, which contain the right voltages 2. kepler won't clock to highest cstates (patch 2) this happens, because there are

I've splitted my big series between the part which actually fixes the engine reclocking bits and the part handling voltage/clock updates on temperature change, so that the more reviewed parts can be merged in faster. This series fixes a lot of Engine reclocking issues found on Fermi, Kepler and all Maxwell generation GPUs. It does _not_ fix memory reclocking on Fermi. It mostly contains of

Response in-line: Op 22-04-17 om 13:22 schreef Karol Herbst: > info.min and info.max doesn't always represent the actual voltage range we > can use. Do the same as with the entry based volting. > > Fixes "ERROR: Can't get value of subfeature in0_min: Can't read" errors > in sensors. > > Signed-off-by: Karol Herbst <karolherbst at gmail.com> >

This series contains a lot of groundwork to finally fix reclocking issues on Kepler+ gpus. There shouldn't be any functional changes with the first patch being the only exception (fixes some voltage table parsing issues with of few kepler gpus) The most interessting thing is the tool in the last patch, which can be ran alongside the nvidia driver to test nouveaus volting code and print the