Displaying 20 results from an estimated 4000 matches similar to: "NVIDIA Falcon Microprocessor Security"
2014 Sep 27
0
NVIDIA Falcon Microprocessor Security
On Sat, Sep 27, 2014 at 3:19 AM, Andy Ritger <aritger at nvidia.com> wrote:
>
> Hi, all.
Hey Andy,
>
> Below is a link to a brief document describing some changes in NVIDIA
> Falcon processors ("fuc", in Nouveau-speak, IIUC)
We started trying to use your names where we know them a while back.
I personally think of "fuc" as short-hand for "falcon
2016 Dec 06
9
[PATCH 0/8] Falcon library
This was the first step of the secure boot refactoring - as Ben asked for some
fixes, I now submit it as its own series to make it easier to review (and also
because rebasing secure boot on top of this takes time and I don't want to do
it until this is validated!).
This series attempts to factorize the duplicate falcon-related code into a
single library, using the existing nvkm_falcon
2016 Dec 13
15
[PATCH v2 0/15] Falcon library
This was the first step of the secure boot refactoring - as Ben asked for some
fixes, I now submit it as its own series to make it easier to review (and also
because rebasing secure boot on top of this takes time and I don't want to do
it until this is validated!).
This series attempts to factorize the duplicate falcon-related code into a
single library, using the existing nvkm_falcon
2014 Nov 25
3
Second copy engine on GF116
On Mon, Nov 24, 2014 at 8:33 PM, Andy Ritger <aritger at nvidia.com> wrote:
> On Fri, Nov 21, 2014 at 01:39:55AM -0500, Ilia Mirkin wrote:
>> On Fri, Nov 21, 2014 at 1:16 AM, Andy Ritger <aritger at nvidia.com> wrote:
>> > Hi Ilia,
>> >
>> > Actually 0x90b8 is different than copy engine. I'm not very familiar
>> > with it, but 0x90b8 is
2014 Nov 21
3
Second copy engine on GF116
On Fri, Nov 21, 2014 at 1:16 AM, Andy Ritger <aritger at nvidia.com> wrote:
> Hi Ilia,
>
> Actually 0x90b8 is different than copy engine. I'm not very familiar
> with it, but 0x90b8 is an engine for performing LZO decompression as
> part of performing the copy. It has a variety of limitations (e.g.,
> cannot handle blocklinear format), and was only in a few Fermi
2016 Feb 24
11
[PATCH v3 00/11] nouveau: add secure boot support for dGPU and Tegra
New version of the secure boot code that works with the blobs just merged into
linux-firmware. Since the required Mesa patches are also merged, this set is
the last piece of the puzzle to get out-of-the-box accelerated Maxwell 2.
The basic code remains the same, with a few improvements with respect to how
secure falcons are started. Hopefully the patchset is better split too.
I have a
2017 Nov 22
3
Addressing the problem of noisy GPUs under Nouveau
Hi Martin,
I was asked to clarify a few things:
(1) Are all the user reports of loud fans on Fermi-era GPUs?
(2) When the VBIOS POSTs the card, it loads initial ucode onto the Falcon
processor (PMU), which will do basic fan management on its own. We call this
init ucode "IFR" (Init From ROM). nvidia.ko will restore the IFR ucode when
unloaded. I assume the loud fan symptom occurs
2016 Jan 18
6
[PATCH v2 0/5] nouveau: add secure boot support for dGPU and Tegra
This is a highly changed revision of the first patch series that adds secure
boot support to Nouveau. This code still depends on NVIDIA releasing official
firmware files, but the files released with SHIELD TV and Pixel C can already
be used on a Jetson TX1.
As you know we are working hard to release the official firmware files, however
in the meantime it doesn't hurt to review the code so it
2016 Oct 27
15
[PATCH v2 00/14] Secure Boot refactoring
This is a rework of the secure boot code that moves the building of the blob
into its own set of source files (and own hooks), making the code more flexible
and (hopefully) easier to understand as well.
This rework is needed to support more signed firmware for existing and new
chips. Since the firmwares in question are not available yet I cannot send the
code to manage then, but hopefully the
2016 Nov 02
15
[PATCH v3 00/15] Secure Boot refactoring
This is a rework of the secure boot code that moves the building of the blob
into its own set of source files (and own hooks), making the code more flexible
and (hopefully) easier to understand as well.
This rework is needed to support more signed firmware for existing and new
chips. Since the firmwares in question are not available yet I cannot send the
code to manage then, but hopefully the
2016 Dec 14
18
[PATCH v5 0/18] Secure Boot refactoring
Sending things in a smaller chunks since it makes their reviewing
easier.
This part part 2/3 of the secboot refactoring/PMU command support
patch series. Part 1 was the new falcon library which should be
merged soon now.
This series is mainly a refactoring/sanitization of the existing
secure boot code. It does not add new features (part 3 will).
Secure boot handling is now separated by NVIDIA
2016 Oct 11
10
[PATCH 0/8] Secure Boot refactoring
Hi everyone,
Apologies for the big patchset. This is a rework of the secure boot code that
moves the building of the blob into its own set of source files (and own hooks),
making the code more flexible and (hopefully) easier to understand as well.
This rework is needed to support more signed firmware for existing and new
chips. Since the firmwares in question are not available yet I cannot send
2016 Nov 21
33
[PATCH v4 0/33] Secure Boot refactoring / signed PMU firmware support for GM20B
This revision includes initial signed PMU firmware support for GM20B
(Tegra X1). This PMU code will also be used as a basis for dGPU signed
PMU firmware support.
With the PMU code, the refactoring of secure boot should also make
more sense.
ACR (secure boot) support is now separated by the driver version it
originates from. This separation allows to run any version of the ACR
on any chip,
2014 Nov 26
1
Second copy engine on GF116
On 25/11/14 22:05, Andy Ritger wrote:
> On Tue, Nov 25, 2014 at 10:57:44AM -0500, Ilia Mirkin wrote:
>> On Mon, Nov 24, 2014 at 8:33 PM, Andy Ritger <aritger at nvidia.com> wrote:
>>> On Fri, Nov 21, 2014 at 01:39:55AM -0500, Ilia Mirkin wrote:
>>>> On Fri, Nov 21, 2014 at 1:16 AM, Andy Ritger <aritger at nvidia.com> wrote:
>>>>> Hi Ilia,
2016 Jan 21
2
[PATCH v2 2/5] core: add support for secure boot
Hi Alexandre,
On 18 January 2016 at 06:10, Alexandre Courbot <acourbot at nvidia.com> wrote:
[snip]
> +static const char *
> +managed_falcons_names[] = {
> + [NVKM_SECBOOT_FALCON_PMU] = "PMU",
> + [NVKM_SECBOOT_FALCON_RESERVED] = "<invalid>",
"<reserved>" perhaps ? we already have one invalid below.
> +
2015 Apr 30
2
[PATCH v4] pmu/gk20a: PMU boot support
On 13 April 2015 at 20:42, Alexandre Courbot <acourbot at nvidia.com> wrote:
> Ben, I guess our main remaining concern with this patch is how it should
> integrate wrt. the existing PMU code. Since it is designed to interact with
> the NVIDIA firmware, maybe we should use a different base code, or do you
> think we can somehow share code and data structures?
Hey Alexandre,
Sorry
2017 Mar 29
15
[PATCH 00/15] Support for GP10B chipset
GP10B is the chip used in Tegra X2 SoCs. This patchset adds support for
its base engines after reworking secboot a bit to accomodate its calling
convention better.
This patchset has been tested rendering simple off-screen buffers using Mesa
and yielded the expected result.
Alexandre Courbot (15):
secboot: allow to boot multiple falcons
secboot: pass instance to LS firmware loaders
secboot:
2015 Jun 19
2
[PATCH 1/6] gr: support for NVIDIA-provided firmwares
On 19 June 2015 at 00:47, Alexandre Courbot <gnurou at gmail.com> wrote:
> NVIDIA will officially start providing signed firmwares through
> linux-firmware. Change the GR firmware lookup function to look them up
> in addition to the extracted firmwares.
I wonder if perhaps we should just replace the mechanism entirely, and
remove the support for nouveau/fuc* as we add
2015 May 15
2
[PATCH v4] pmu/gk20a: PMU boot support
On 12 May 2015 at 19:04, Alexandre Courbot <gnurou at gmail.com> wrote:
> Hi Ben,
>
> On Fri, May 1, 2015 at 8:01 AM, Ben Skeggs <skeggsb at gmail.com> wrote:
>> On 13 April 2015 at 20:42, Alexandre Courbot <acourbot at nvidia.com> wrote:
>>> Ben, I guess our main remaining concern with this patch is how it should
>>> integrate wrt. the existing
2016 Jun 08
4
[PATCH 0/4] secboot: be more resilient on errors
This series fixes two cases where behavior on secure boot errors could be
improved:
1) Patch 2 propages secure-boot errors from GR init, making sure initialization
fails as it should. Failure to do so results in a black screen during boot,
as reported in FD bug 94990.
2) Patches 3-4 make the absence of required secure firmware files a non-fatal
error. The previous behavior was to give up