Displaying 20 results from an estimated 800 matches similar to: "[PATCH] copy: don't bother trying to create copy on pre-nva3"
2017 Mar 22
0
[PATCH xf86-video-nouveau] Add Pascal family support, identical to Maxwell
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
Untested.
src/nouveau_copy.c | 2 ++
src/nouveau_exa.c | 1 +
src/nv_accel_common.c | 1 +
src/nv_driver.c | 3 +++
src/nv_type.h | 1 +
src/nvc0_accel.c | 6 ++++++
6 files changed, 14 insertions(+)
diff --git a/src/nouveau_copy.c b/src/nouveau_copy.c
index 7118a7a..7fbcc87 100644
--- a/src/nouveau_copy.c
2017 Mar 22
0
[PATCH xf86-video-nouveau v2] Add Pascal family support, identical to Maxwell
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
v1 -> v2: add 0x130 as a valid chip type early on in detection
src/nouveau_copy.c | 2 ++
src/nouveau_exa.c | 1 +
src/nv_accel_common.c | 1 +
src/nv_driver.c | 4 ++++
src/nv_type.h | 1 +
src/nvc0_accel.c | 6 ++++++
6 files changed, 15 insertions(+)
diff --git a/src/nouveau_copy.c
2016 Oct 27
1
[PATCH v2 6/7] copy: add maxwell/pascal copy engine classes
0xc0b5 is not in rnndb, I guess it should be GP100_COPY, right?
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
On 10/27/2016 04:02 PM, Ilia Mirkin wrote:
> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
> ---
> src/nouveau_copy.c | 2 ++
> src/nvc0_accel.c | 10 +++++++++-
> 2 files changed, 11 insertions(+), 1 deletion(-)
>
> diff --git
2016 Oct 27
0
[PATCH v2 1/7] exa: add GM10x acceleration support
rendercheck -f a8r8g8b8 passes as much as on a GK208, and xv appears to
work. Very lightly tested.
Instead of sticking coordinates into pushbufs, the vertex shader is
modified to read them from a constbuf, indexed by vertex id. This
approach could be used for all nvc0 generations, but I didn't want to
rock the boat.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
2016 Oct 17
0
[PATCH] exa: add GM10x acceleration support
Looks reasonable, some minor comments below.
On 10/16/2016 02:06 AM, Ilia Mirkin wrote:
> rendercheck -f a8r8g8b8 passes as much as on a GK208, and xv appears to
> work. Very lightly tested.
>
> Instead of sticking coordinates into pushbufs, the vertex shader is
> modified to read them from a constbuf, indexed by vertex id. This
> approach could be used for all nvc0 generations,
2016 Oct 27
0
[PATCH v2 6/7] copy: add maxwell/pascal copy engine classes
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
src/nouveau_copy.c | 2 ++
src/nvc0_accel.c | 10 +++++++++-
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/src/nouveau_copy.c b/src/nouveau_copy.c
index c139de6..7118a7a 100644
--- a/src/nouveau_copy.c
+++ b/src/nouveau_copy.c
@@ -42,6 +42,8 @@ nouveau_copy_init(ScreenPtr pScreen)
int engine;
Bool
2016 Oct 16
2
[PATCH] exa: add GM10x acceleration support
rendercheck -f a8r8g8b8 passes as much as on a GK208, and xv appears to
work. Very lightly tested.
Instead of sticking coordinates into pushbufs, the vertex shader is
modified to read them from a constbuf, indexed by vertex id. This
approach could be used for all nvc0 generations, but I didn't want to
rock the boat.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
Note: this
2024 Sep 23
1
[PATCH 1/2] nouveau/dmem: Fix privileged error in copy engine channel
When `nouveau_dmem_copy_one` is called, the following error occurs:
[272146.675156] nouveau 0000:06:00.0: fifo: PBDMA9: 00000004 [HCE_PRIV]
ch 1 00000300 00003386
This indicates that a copy push command triggered a Host Copy Engine
Privileged error on channel 1 (Copy Engine channel). To address this
issue, modify the Copy Engine channel to allow privileged push commands
Fixes: 6de125383a5cc
2024 Oct 08
1
[PATCH v3 1/2] nouveau/dmem: Fix privileged error in copy engine channel
From: Yonatan Maman <Ymaman at Nvidia.com>
When `nouveau_dmem_copy_one` is called, the following error occurs:
[272146.675156] nouveau 0000:06:00.0: fifo: PBDMA9: 00000004 [HCE_PRIV]
ch 1 00000300 00003386
This indicates that a copy push command triggered a Host Copy Engine
Privileged error on channel 1 (Copy Engine channel). To address this
issue, modify the Copy Engine channel to allow
2009 Dec 14
0
[PATCH] drm/nouveau: Unregister irq handler if init fails
---
drivers/gpu/drm/nouveau/nouveau_state.c | 52 ++++++++++++++++---------------
1 files changed, 27 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index 2ed41d3..25d207c 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -317,7 +317,7 @@ nouveau_card_init(struct
2009 Dec 14
0
[PATCH] drm/nouveau: Add proper error handling to nouveau_card_init
---
drivers/gpu/drm/nouveau/nouveau_state.c | 73 ++++++++++++++++++++-----------
1 files changed, 48 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index 2ed41d3..9fc5824 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -317,7 +317,7 @@ nouveau_card_init(struct
2015 Mar 14
1
[PATCH ddx] Add support for VRAM-less devices to the ddx
With this patch the DDX almost works with GK20A, the missing piece is adding COHERENT mappings to the right places. ;-)
If you specify NOUVEAU_BO_APER the kernel will truncate valid_domains to the domains specified at creation time.
This means that as long as we only specify the correct domain in nouveau_allocate_surface the effect is still the same.
Signed-off-by: Maarten Lankhorst <dev at
2009 Dec 19
1
[PATCH] drm/nouveau: always do buffer object moves on bo->channel
- Use the "direct" objects that previously only the kernel fifo had.
- This avoids corruption on some buffer moves.
Signed-off-by: Maarten Maathuis <madman2003 at gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 23 ++---------------
drivers/gpu/drm/nouveau/nouveau_object.c | 36 ++++++++++++++++++++++++++++
drivers/gpu/drm/nouveau/nouveau_state.c | 38
2016 Oct 27
11
[PATCH v2 0/7] Add Maxwell support
I believe I've addressed all the feedback from the first time around, and
also made fixes necessary for GM20x based on testing results. I believe
now it should actually work for all GM10x and GM20x. Further, GP10x should
be very easy to add, but without someone to actually test I didn't want to
claim support for it.
Ilia Mirkin (7):
exa: add GM10x acceleration support
hwdefs: update
2014 Aug 29
1
RESENT NVA3 clock tree improvements
Re-resend of patch #7 to move the _post and _pre function prototypes to nva3.h
2012 Aug 04
1
[PATCH] nouveau: Do not use nva3 engine for 0xaf chipset
The nva3 copy engine exhibits random memory corruption in at least one
case, the GeForce 320M (nv50, 0xaf) in the MacBookAir3,1. This patch
omits creating the engine for the specific chipset, falling back to
M2MF, which kills the symptoms.
Signed-off-by: Henrik Rydberg <rydberg at euromail.se>
---
Hi Ben,
this patch is still needed in 3.6-rc1, so perhaps we should apply it
after all. I
2014 Aug 21
0
[PATCH 2/7] clock/nva3: Set PLL refclk
Signed-off-by: Roy Spliet <rspliet at eclipso.eu>
---
drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c | 73 +++++++++++++++---------
drivers/gpu/drm/nouveau/core/subdev/clock/nva3.h | 2 +-
drivers/gpu/drm/nouveau/core/subdev/fb/ramnva3.c | 2 +-
3 files changed, 48 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c
2013 Sep 20
5
[Bug 69594] New: NVA3 - Flash overlays all tabs
https://bugs.freedesktop.org/show_bug.cgi?id=69594
Priority: medium
Bug ID: 69594
Assignee: nouveau at lists.freedesktop.org
Summary: NVA3 - Flash overlays all tabs
Severity: normal
Classification: Unclassified
OS: Linux (All)
Reporter: tod.jackson at gmail.com
Hardware: x86-64 (AMD64)
Status:
2014 Aug 21
0
[PATCH 7/7] clock/nva3: Pause the GPU before reclocking
Signed-off-by: Roy Spliet <rspliet at eclipso.eu>
---
.../gpu/drm/nouveau/core/include/subdev/clock.h | 3 ++
drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c | 45 ++++++++++++++++++++++
drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c | 30 ++++-----------
3 files changed, 55 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h
2013 Jul 03
0
[PATCH] drm/nva3/disp: Fix HDMI audio regression
This is the nva3 counterpart to commit beba44b17 (drm/nv84/disp: Fix
HDMI audio regression). The regression happened as a result of
refactoring in commit 8e9e3d2de (drm/nv84/disp: move hdmi control into
core).
Reported-and-tested-by: Max Baldwin <archerseven at gmail.com>
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
The actual testing was done on a NVCF card (550 Ti).