similar to: [PATCH 1/3] bios/fan: add support for maxwell's fan management table

Re-use the therm-exported fan structure with only two minor modifications: - pwm_freq: u16 -> u32; - add fan_type (toggle or PWM) v2: - Do not memset the table to 0 as it erases the pre-set default values Signed-off-by: Martin Peres <martin.peres at free.fr> --- drm/Kbuild | 1 + drm/core/include/subdev/bios/fan.h | 1 + drm/core/subdev/bios/fan.c | 1

We will use this subdev to disable temperature reading on cards that did not get a sensor calibration in the factory. Signed-off-by: Martin Peres <martin.peres at free.fr> --- configure.ac | 1 + drm/Kbuild | 4 ++ drm/core/include/subdev/fuse.h | 1 + drm/core/subdev/fuse/base.c | 1 + drm/core/subdev/fuse/g80.c | 1 +

From: Martin Peres <martin.peres at labri.fr> This is safe because ptherm hasn't been configured yet and will be a little further down the initialization path. Ptherm should be safe regarding to runtime reconfiguration. v2: - do not limit this patch to nv84-a3 and make it nv84+ v3: - move the ack to fini() - disable IRQs on fini() - silently ignore un-requested IRQs

From: Martin Peres <martin.peres at labri.fr> This should fix a deadlock that has been reported to us where fan_update() would hold the fan lock and try to grab the alarm_program_lock to reschedule an update. On an other CPU, the alarm_program_lock would have been taken before calling fan_update(), leading to a deadlock. We should Cc: <stable at vger.kernel.org> # 3.9+ Reported-by:

From: Martin Peres <martin.peres at labri.fr> Signed-off-by: Martin Peres <martin.peres at free.fr> --- drm/Kbuild | 1 + drm/core/subdev/therm/gm107.c | 1 + nvkm/engine/device/gm100.c | 4 +- nvkm/include/subdev/therm.h | 1 + nvkm/subdev/therm/Makefile.am | 3 +- nvkm/subdev/therm/fan.c | 9 ++++- nvkm/subdev/therm/gm107.c | 93

From: Martin Peres <martin.peres at labri.fr> This is safe because ptherm hasn't been configured yet and will be a little further down the initialization path. Ptherm should be safe regarding to runtime reconfiguration. v2: - do not limit this patch to nv84-a3 and make it nv84+ Signed-off-by: Martin Peres <martin.peres at labri.fr> ---

From: Martin Peres <martin.peres at labri.fr> Some vbioses have extra useless entries after "the end" of the table. This is problematic since all of the vbios I found with this issue redefine the pwm freq divider to insane levels (52750 Hz instead of 2500), thus breaking fan management. The first solution to solve this mess would be to change the length of the table. The solution

Current uninitialized sensor detection does not work for me on nv4b and sensor returns crazy values (>190?C). It stabilises later, but it's too late - therm code shutdowns the machine... Let's just reset it on init. Signed-off-by: Marcin Slusarz <marcin.slusarz at gmail.com> --- drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c | 12 +++++++++++- 1 file changed, 11

On 13.09.2014 23:45, Roy Spliet wrote: > Dear Poma, > > Don't get anyone wrong, your input is greatly valued. The reason why > "we" (nouveau developers) generally ask for a git bisection is because > we don't know or track specific distributions. Although your search has > narrowed the problem down (thanks for that!), we don't know how big the >

From: Martin Peres <martin.peres at labri.fr> This patchset is mostly about fixing fdo bug #66177, reported by Dash Four. This bug is about fan/temp management not working after a suspend/resume cycle. Fan/therm management relies on ptimer's alarm feature to call periodically multiple callbacks that poll the temperature and update the fan speed if needed. The problem is that there is

There might be some callers of nouveau_clock_astate(), and they are from inetrrupt context. So we must ensure that this function can be atomic in that condition. This patch adds one parameter which is subsequently passed to nouveau_pstate_calc(). Therefore we can choose whether we want to wait for the pstate work's completion or not. Signed-off-by: Vince Hsu <vinceh at nvidia.com> ---

+ the same for shutdown threshold - seems impossible, but shutdown can fail. Signed-off-by: Marcin Slusarz <marcin.slusarz at gmail.com> --- drivers/gpu/drm/nouveau/core/subdev/therm/temp.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/nouveau/core/subdev/therm/temp.c b/drivers/gpu/drm/nouveau/core/subdev/therm/temp.c index bf9b3ce..8f27b44

On 13.09.2014 22:58, Ilia Mirkin wrote: > On Sat, Sep 13, 2014 at 4:52 PM, poma <pomidorabelisima at gmail.com> wrote: >> On 13.09.2014 07:02, poma wrote: >>> On 13.09.2014 06:57, poma wrote: >>>> >>>> Actually I have nothing to show cause logs are all OK. >>>> Haha, it seems to me that the bugs become intelligent. >>>>

This adds support for enabling automatic clockgating on nvidia GPUs for Fermi and later generations. This saves a little bit of power, bringing my fermi GPU's power consumption from ~28.3W on idle to ~27W, and my kepler's idle power consumption from ~23.6W to ~21.65W. Similar to how the nvidia driver seems to handle this, we enable clockgating for each engine that supports it after

So... I was wondering what the impact of splitting up the card compilation by e.g. generation would be. Depending on the split things would get fairly intertwined, so I thought I'd start small. This just splits NVC0 from everything else. I figure that for the people this matters the most to, NVC0 is the least relevant card -- people with sub-1GB of RAM, older hardware. With my config options

i2c_bit_add_bus can call the pre_xfer function, which expects the func pointer to be set. Pass in func to the port creation logic so that it is set before i2c_bit_add_bus. See https://bugs.freedesktop.org/show_bug.cgi?id=68456 Reported-by: Hans-Peter Deifel <hpdeifel at gmx.de> Tested-by: Hans-Peter Deifel <hpdeifel at gmx.de> Signed-off-by: Ilia Mirkin <imirkin at

Latest patches for GK20A, taking comments received for v3 into account. Changes since v3: - use only pfn_to_page() and page_to_pfn() in GK20A's FB. These functions are present on every arch and the physical address to page frame number conversion is also consistently a shift of PAGE_SHIFT. This part will probably be replaced by something nicer in the future anyway. - fixed a warning on

On Wed, 2017-04-26 at 00:49 +0200, Karol Herbst wrote: > Hi Lyude, > > thanks for the great work. Just a view comments inline. > > 2017-04-25 20:38 GMT+02:00 Lyude <lyude at redhat.com>: > > This adds support for enabling automatic clockgating on nvidia GPUs > > for > > Fermi and later generations. This saves a little bit of power, > > bringing >

Hi everyone, Way overdue v2 of the final patches that enable basic GK20A support. Hopefully all the issues raised with v1 have been addressed. Changes since v1: - Use gk20a clock driver by Ben instead of twiddling nv04's - Name new classes after gk20a instead of nvea - Addressed comments about BAR initialization code factorization - Removed non-essential code which only purpose was to avoid

nv92 hardware has only 16 interrupt lines, while nv94 and later has 32. Accessing 0xe0c{0,4} registers on nv92 can lead to incorrect PDISP setup. This is a regression introduced with commit 9d0f5ec9ee0fd5dc5fc1cc2cf559286431e406e3 Author: Ben Skeggs <bskeggs at redhat.com> Date: Mon May 12 15:22:42 2014 +1000 gpio: split g92 class from nv50 Reported-by: estece on #nouveau Cc: stable