similar to: [Bug 79462] New: [NVC0/Codegen] Shader compilation falis in spill logic

Displaying 20 results from an estimated 1000 matches similar to: "[Bug 79462] New: [NVC0/Codegen] Shader compilation falis in spill logic"

2017 Aug 19
1
[PATCH] nv50/ra: Only increment DefValue counter if we are going to spill
This is in preparation of an upcoming patch changing how we keep track of the defs. Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> --- src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
2014 Sep 01
0
[PATCH] nv50/ir: use unordered_set instead of list to keep track of var defs
The set of variable defs does not need to be ordered in any way, and removing/adding elements is a fairly common operation in various optimization passes. This shortens runtime of piglit test fp-long-alu to ~11s from ~22s No piglit regressions observed on nvc0! Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> --- src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
2014 Jul 08
1
[PATCH] nv50/ir: use unordered_set instead of list to keep our instructions in uses
This shortens runtime of piglit test fp-long-alu to ~22s No piglit regressions observed on nvc0! Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> --- src/gallium/drivers/nouveau/codegen/nv50_ir.cpp | 6 +++--- src/gallium/drivers/nouveau/codegen/nv50_ir.h | 7 ++++--- src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 2 +-
2014 Dec 02
0
[PATCH RESEND] nv50/ir: use unordered_set instead of list to keep track of var defs
The set of variable defs does not need to be ordered in any way, and removing/adding elements is a fairly common operation in various optimization passes. This shortens runtime of piglit test fp-long-alu to ~11s from ~22s No piglit regressions observed on nvc0! Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> --- src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
2014 Sep 25
0
[PATCH] nv50/ir: avoid deleting pseudo instructions too early
What happens is that a SPLIT operation is part of the spill node, and as a pseudo op, the instruction gets erased after processing its first def. However the later defs still need to refer to it, so instead delay spilling until after that whole RA node is done processing. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79462 Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> Cc:
2017 Jul 31
1
[RFC PATCH] nv50/ir: allow spilling of def values for constrained MERGES/UNIONS
This lets us spill more values and compile a big shader for Civilization 6. Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> --- src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp index b33d7b4010..f29c8a1a95
2014 Feb 14
0
Regression caused by 2e9ee44797 ("nv50/ir/ra: some register spilling fixes")
Hi Christoph, bin/shader_runner tests/spec/glsl-1.40/uniform_buffer/fs-struct-copy-complicated.shader_test -auto bin/shader_runner tests/spec/glsl-1.40/uniform_buffer/vs-struct-copy-complicated.shader_test -auto bin/shader_runner tests/spec/glsl-1.50/uniform_buffer/gs-struct-copy-complicated.shader_test -auto Now all segfault. I reverted 2e9ee44797 ("nv50/ir/ra: some register spilling
2017 Mar 26
5
[PATCH v5 0/5] nvc0/ir: add support for MAD/FMA PostRALoadPropagation
was "nv50/ir: PostRaConstantFolding improvements" before. nothing really changed from the last version, just minor things. Karol Herbst (5): nv50/ir: restructure and rename postraconstantfolding pass nv50/ir: implement mad post ra folding for nvc0+ gk110/ir: add LIMM form of mad gm107/ir: add LIMM form of mad nv50/ir: also do PostRaLoadPropagation for FMA
2015 Sep 06
17
[Bug 91895] New: [nve7] Shadow Warrior: black gun & messed up colors
https://bugs.freedesktop.org/show_bug.cgi?id=91895 Bug ID: 91895 Summary: [nve7] Shadow Warrior: black gun & messed up colors Product: Mesa Version: git Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/DRI/nouveau
2015 Nov 26
2
NV50 compute support questions
Hi, On 26-11-15 09:42, Samuel Pitoiset wrote: > Well, if you remove that assert locally, all compute tests in src/gallium/tests/trivial/compute.c pass on GK106, except the atomic ones. Do you mean the: Assertion `pres->target != PIPE_BUFFER' failed. or the: Assertion `tex->defExists(0) && tex->srcExists(0)' failed. assert? Or is the first one not present for
2015 Nov 25
4
NV50 compute support questions
Hi, On 20-11-15 17:07, Samuel Pitoiset wrote: > > > On 11/20/2015 11:36 AM, Hans de Goede wrote: >> Hi Samual, et al, > > Hi Hans, > >> >> In >> http://cgit.freedesktop.org/mesa/mesa/commit/src/gallium/drivers/nouveau?id=ff72440b40211326eda118232fabd53965410afd >> >> you write: "This compute support has been tested by >> Pierre
2017 Aug 11
2
[PATCH] nv50/ir: Initialize all members of GCRA (trivial)
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> --- src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp index 9d70ec3c9c..e4f38c8e46 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp +++
2017 Dec 30
1
[PATCH v2] nv50/ir: Initialize all members of GCRA (trivial)
v2: use initialization list (Pierre) Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> Reviewed-by: Pierre Moreau <pierre.morrow at free.fr> --- src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
2014 Jul 18
5
[PATCH 0/5] nvc0: fp64 preparation
Most of codegen is already FP64-ready. There are a few edge-cases that I ran into, many of which can apply even to non-fp64-enabled programs (although the double-wide registers are not very common without fp64). I've yet to give this a full piglit run, but wanted to send these out in case someone wanted to comment. They do not depend on the preliminary core fp64 work. Ilia Mirkin (5):
2015 Nov 26
0
NV50 compute support questions
Well, if you remove that assert locally, all compute tests in src/gallium/tests/trivial/compute.c pass on GK106, except the atomic ones. I'm working on the fermi case btw. On 11/25/2015 03:43 PM, Hans de Goede wrote: > Hi, > > On 20-11-15 17:07, Samuel Pitoiset wrote: >> >> >> On 11/20/2015 11:36 AM, Hans de Goede wrote: >>> Hi Samual, et al, >>
2015 Nov 26
0
NV50 compute support questions
On 11/26/2015 01:21 PM, Hans de Goede wrote: > Hi, > > On 26-11-15 09:42, Samuel Pitoiset wrote: >> Well, if you remove that assert locally, all compute tests in >> src/gallium/tests/trivial/compute.c pass on GK106, except the atomic >> ones. > > Do you mean the: > > Assertion `pres->target != PIPE_BUFFER' failed. > > or the: > >
2015 Nov 25
0
NV50 compute support questions
On 11/25/2015 03:43 PM, Hans de Goede wrote: > Hi, > > On 20-11-15 17:07, Samuel Pitoiset wrote: >> >> >> On 11/20/2015 11:36 AM, Hans de Goede wrote: >>> Hi Samual, et al, >> >> Hi Hans, >> >>> >>> In >>>
2015 Nov 20
4
NV50 compute support questions
Hi Samual, et al, In http://cgit.freedesktop.org/mesa/mesa/commit/src/gallium/drivers/nouveau?id=ff72440b40211326eda118232fabd53965410afd you write: "This compute support has been tested by Pierre Moreau and myself with some compute kernels." Can you provide testing instructions (and the necessary files) so that I can try to reproduce your tests ? And once I've reproduced your
2009 Mar 02
0
[PATCH 3 of 13] remove bgr
Import "remove bgr" from qemu mainstream. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6335 c046a42c-6fe2-441c-8c8c-71466251a162 Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> --- diff --git a/hw/musicpal.c b/hw/musicpal.c index d6bd9ec..44a5659 100644 --- a/hw/musicpal.c +++ b/hw/musicpal.c @@ -835,7 +835,7 @@ static void lcd_refresh(void *opaque)
2016 Jan 06
1
[PATCH] nv50/ir: don't touch degree on physreg RIG nodes
These nodes don't go through reduction, so we shouldn't be increasing their degrees. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91895 Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> Cc: "11.0 11.1" <mesa-stable at lists.freedesktop.org> --- I would like to see a *bunch* of testing on this before merging it... RA-land is far from my expertise.