similar to: [PATCH] drm/gk20a/fb: fix NULL dereference

Fix a very shameful memory leak and a compilation error due to the use of non-exported CMA functions. The workaround for the latter is not really elegant (replace the CMA functions by a runtime failure if we are compiled as a module), but is temporary and still an improvement over the current situation (compile error). Alexandre Courbot (2): drm/gk20a/fb: fix huge memory leak drm/gk20a/fb:

GK20A's RAM driver was using CMA functions in order to allocate VRAM. This is wrong because these functions are not exported, which causes compilation to fail when CMA is enabled and Nouveau is built as a module. On top of that the driver was leaking (or rather bleeding) memory. dma_alloc_coherent() will also use CMA when needed but has the advantage of being properly exported. It creates a

Add a simple FB device for GK20A, as well as a RAM implementation based on contiguous DMA memory allocations suitable for chips that use system memory as video RAM. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drivers/gpu/drm/nouveau/Makefile | 2 + drivers/gpu/drm/nouveau/core/include/subdev/fb.h | 1 + drivers/gpu/drm/nouveau/core/subdev/fb/gk20a.c

On Mon, Apr 21, 2014 at 03:02:16PM +0900, Alexandre Courbot wrote: [...] > diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/ramgk20a.c b/drivers/gpu/drm/nouveau/core/subdev/fb/ramgk20a.c [...] > + pages = dma_alloc_from_contiguous(dev, ncmin, order); > + if (!pages) { > + gk20a_ram_put(pfb, &mem); > + return -ENOMEM; > + } > + > + dma_addr =

On Wed, Apr 23, 2014 at 11:07 AM, Alexandre Courbot <acourbot at nvidia.com> wrote: > On 04/22/2014 07:40 PM, Thierry Reding wrote: >> >> * PGP Signed by an unknown key >> >> >> On Mon, Apr 21, 2014 at 03:02:16PM +0900, Alexandre Courbot wrote: >> [...] >>> >>> diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/ramgk20a.c >>>

Latest patches for GK20A, taking comments received for v3 into account. Changes since v3: - use only pfn_to_page() and page_to_pfn() in GK20A's FB. These functions are present on every arch and the physical address to page frame number conversion is also consistently a shift of PAGE_SHIFT. This part will probably be replaced by something nicer in the future anyway. - fixed a warning on

Hi everyone, Way overdue v2 of the final patches that enable basic GK20A support. Hopefully all the issues raised with v1 have been addressed. Changes since v1: - Use gk20a clock driver by Ben instead of twiddling nv04's - Name new classes after gk20a instead of nvea - Addressed comments about BAR initialization code factorization - Removed non-essential code which only purpose was to avoid

Changes since v2: - Enabled software class - Removed unneeded changes to nouveau_accel_init() - Replaced use of architecture-private pfn_to_dma() and dma_to_pfn() with the portable page_to_phys()/phys_to_page() - Fixed incorrect comment/commit log talking about bytes instead of words Hope this looks good! Once this gets merged the next set will be to use this driver on Jetson and Venice2

On 04/22/2014 07:40 PM, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Mon, Apr 21, 2014 at 03:02:16PM +0900, Alexandre Courbot wrote: > [...] >> diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/ramgk20a.c b/drivers/gpu/drm/nouveau/core/subdev/fb/ramgk20a.c > [...] >> + pages = dma_alloc_from_contiguous(dev, ncmin, order); >> + if (!pages) {

On Wed, Apr 23, 2014 at 03:11:01PM +0900, Alexandre Courbot wrote: > On Wed, Apr 23, 2014 at 11:07 AM, Alexandre Courbot <acourbot at nvidia.com> wrote: > > On 04/22/2014 07:40 PM, Thierry Reding wrote: > >> > >> * PGP Signed by an unknown key > >> > >> > >> On Mon, Apr 21, 2014 at 03:02:16PM +0900, Alexandre Courbot wrote: > >>

On Mon, Apr 28, 2014 at 8:44 PM, Thierry Reding <thierry.reding at gmail.com> wrote: > On Wed, Apr 23, 2014 at 03:11:01PM +0900, Alexandre Courbot wrote: >> On Wed, Apr 23, 2014 at 11:07 AM, Alexandre Courbot <acourbot at nvidia.com> wrote: >> > On 04/22/2014 07:40 PM, Thierry Reding wrote: >> >> >> >> * PGP Signed by an unknown key >>

GK20A does not have dedicated RAM, thus having a RAM device for it does not make sense. Move the contiguous physical memory allocation to instmem. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drm/nouveau/include/nvkm/subdev/instmem.h | 1 + drm/nouveau/nvkm/engine/device/gk104.c | 2 +- drm/nouveau/nvkm/subdev/fb/ramgk20a.c | 86 +-----------

Changes since v3: - Use a single dma_attr for all DMA-API allocations in instmem instead of one per allocation - Use device.info.ram_size instead of pfb->ram to check whether VRAM is present outside of nvkm Changes since v2: - Cleaner changes for ltc - Fixed typos in gk20a instmem IOMMU comments Changes since v1: - Add missing else condition in ltc - Remove extra flags that slipped into

Changes since v1: - Add missing else condition in ltc - Remove extra flags that slipped into nouveau_display.c and nv84_fence.c. Original cover letter: Patches 1-3 make the presence of a RAM device optional, and remove GK20A's dummy RAM driver we were using so far. On chips using shared memory, such a device can confuse the driver into moving objects where there is no need to, and can trick

A series I have waited too long to submit, and the recent refactoring made me pay the price of my perfectionism, so here are the features that are at least completed Patches 1-3 make the presence of a RAM device optional, and remove GK20A's dummy RAM driver we were using so far. On chips using shared memory, such a device can confuse the driver into moving objects where there is no need to,

Thanks Ilia for the v2 review! Here is the v3 of this IOMMU support for GK20A series. Changes since v2: - Cleaner changes for ltc - Fixed typos in gk20a instmem IOMMU comments Changes since v1: - Add missing else condition in ltc - Remove extra flags that slipped into nouveau_display.c and nv84_fence.c. Original cover letter: Patches 1-3 make the presence of a RAM device optional, and remove

Kernel panic caused by list corruption in ltcg seems to indicate a concurrency issue. Take mutex of pfb like nv50_ram_put() to eliminate concurrency. V2: Separate critical section into separate function, avoid taking the lock twice on NVC0 Signed-off-by: Roy Spliet <r.spliet at student.tudelft.nl> --- drivers/gpu/drm/nouveau/core/subdev/fb/priv.h | 2 +-

Kernel panic caused by list corruption in ltcg seems to indicate a concurrency issue. Take mutex of pfb like nv50_ram_put() to eliminate concurrency. Signed-off-by: Roy Spliet <r.spliet at student.tudelft.nl> --- drivers/gpu/drm/nouveau/core/subdev/fb/ramnvc0.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git

Second version of the gk20a clock patches. I have tried to keep the therm and volt devices mandatory in the clock driver, but unfortunately they are too tied to bios to allow this, at least for the moment. Consequently this version is mostly a port of the first version to Ben's tree. Ben, please let me know what I have done wrong in terms of integration to your tree, as the main purpose of

Also fix some timings for NVA0 Signed-off-by: Roy Spliet <r.spliet at student.tudelft.nl> --- drivers/gpu/drm/nouveau/nouveau_mem.c | 45 +++++++++++++++++++---------------- 1 file changed, 25 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c index 4f6a572..35b5858 100644 --- a/drivers/gpu/drm/nouveau/nouveau_mem.c